IP Library Granted Patent US 7,707,235
Granted Patent B2
US 7,707,235 · App. 10/586,915 · Granted Apr 27, 2010

Free-running numerically-controlled oscillator using complex multiplication with compensation for amplitude variation due to cumulative round-off errors

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Quick Facts
Patent No.
US 7,707,235
App. No.
10/586,915
Granted
Apr 27, 2010
Kind
B2
Abstract

A method and apparatus for efficiently generating complex sinusoids of a desired frequency by multiplying a phasor by a predetermined value once every sampling interval, and using the highest order bits within the phasor to identify if the phasor is at an integer multiple 45 degrees and substituting components in the phasor if it is determined that the phasor is an integer multiple of 45 degrees. If the phasor is not identified as being an integer multiple of 45 degrees then an error factor for both the real and imaginary components is determined and the real and imaginary components are corrected by removing the error factor.

Claims (99)

1. A method for generating complex sinusoids of a desired frequency using an oscillator comprising the steps of:

multiplying a current phasor by a predetermined value ( 14 ) once every sampling interval to create a next phasor by the oscillator;

identifying if a zero value condition exists within either real component of the next phasor or imaginary component of the next phasor by the oscillator; and

if the zero value condition exists, substituting a complementary component of the real component or the imaginary component of the next phasor that exhibits the zero value condition with a complex component that has unity amplitude by the oscillator.

2. The method of claim 1 further comprising:

if the zero value condition does not exist, identifying if a condition of equality exists between absolute value of the real component of the next phasor and absolute value of the imaginary component of the next phasor;

if the condition of equality exists, substituting both the real and imaginary components of the next phasor with a complex component that has a square-root of one-half unity amplitude.

3. The method of claim 2 further comprising:

if the condition of equality does not exist, determining an error factor for the real and imaginary components of the next phasor and correcting the real and imaginary components by removing the error factor.

4. The method of claim 3 , wherein the error factor, the real and imaginary components of the next phasor and corrected real and imaginary components satisfy:

x

=

x

-

ɛ

×

x

,

y

=

y

-

ɛ

×

y

,

where ε represents the error factor, x and y represent the real and imaginary components of the next phasor, respectively, and x′ and y′ represent the corrected real and imaginary components of the next phasor, respectively.

5. The method of claim 4 , wherein the error factor and the real and imaginary components of the next phasor satisfy:

ɛ

=

x

2

×

y

2

-

1.0

2

.

6. The method of claim 2 , wherein the identifying if the zero value condition exists within either the real component of the next phasor or the imaginary component of the next phasor comprises examining a plurality of highest order bits of the next phasor for the zero value condition, and wherein the identifying if the condition of equality exists between the real component of the next phasor and the imaginary component of the next phasor comprises examining a plurality of highest order bits of the next phasor for the condition of equality.

7. The method of claim 6 , wherein the examining the highest order bits of the next phasor for the zero value condition comprises determining if all the highest bits of the next phasor are either a logical 0 or a logical 1.

8. The method of claim 1 , wherein the identifying if the zero value condition exists within either the real component of the next phasor or the imaginary component of the next phasor comprises identifying whether either the real component of the next phasor is zero or whether the imaginary component of the next phasor is zero, wherein the substituting the complementary component of the real component or the imaginary component of the next phasor that exhibits the zero value condition with the complex component that has unity amplitude comprises:

substituting the real component of the next phasor with the complex component that has unity amplitude when the imaginary component of the next phasor is zero; and

substituting the imaginary component of the next phasor with the complex component that has unity amplitude when the real component of the next phasor is zero.

9. The method of claim 1 further comprising employing a sampling rate that is at least twice the desired frequency.

10. A method for generating complex sinusoids of a desired frequency using an oscillator comprising the steps of:

multiplying a current phasor by a predetermined value ( 14 ) once every sampling interval to create a next phasor by the oscillator;

identifying if the next phasor is integer multiple of 45 degrees ( 16 , 20 ) and substituting at least one component ( 18 , 24 ) within the next phasor with a complex component that has unity amplitude or a complex component that has a square-root of one-half unity amplitude if the next phasor is determined to be integer multiple of 45 degrees by the oscillator;

determining an error factor ( 26 ) if the next phasor is not identified to be integer multiple of 45 degrees by the oscillator; and

correcting the real and imaginary components by removing the error factor ( 28 ) by the oscillator.

11. The method of claim 10 , wherein the step of identifying is performed by examining logic values of a plurality of highest order bits of the next phasor to determine if the next phasor is integer multiple of 45 degrees.

12. The method of claim 10 , wherein the step of identifying further comprises identifying if a zero value condition exist ( 16 ) within either real or imaginary components of the next phasor and substituting a complementary component of the real component or the imaginary component of the next phasor that exhibits the zero value condition with a complex component that has unity amplitude.

13. The method of claim 10 , wherein the step of identifying further comprises identifying if a condition of equality exists ( 20 ) between absolute values of real and imaginary components of the next phasor and if the condition of equality exists substituting both the real and imaginary components of the next phasor with a complex component that has a square-root of one-half unity amplitude.

14. The method of claim 10 , wherein the error factor, the real and imaginary components of the next phasor and corrected real and imaginary components satisfy:

x

=

x

-

ɛ

×

x

,

y

=

y

-

ɛ

×

y

,

ɛ

=

x

2

+

y

2

-

1.0

2

,

where ε represents the error factor, x and y represent the real and imaginary components of the next phasor, respectively, and x′ and y′ represent the corrected real and imaginary components of the next phasor, respectively.

15. A method for efficiently generating complex sinusoids of a desired frequency using an oscillator comprising the steps of:

successively multiplying a current phasor by a predetermined value once every sampling interval to create a plurality of next phasors by the oscillator; and

compensating for cumulative round-off errors ( 28 ) occurring within the next phasors by the oscillator, wherein the step of compensating comprises the step of examining logic values of a plurality of the most significant bit of the next phasors for the cumulative round-off errors, wherein the step of examining comprises the steps of:

detecting a condition of zero value ( 16 ) within components of the next phasors; and

substituting complementary components of components of the next phasors for which the condition of zero value is detected with complex components that have unity amplitudes, respectively.

16. The method of claim 15 , wherein the step of examining further comprises the steps of:

detecting a condition of equal absolute-valued components ( 20 ) of the next phasors, wherein the detecting comprises identifying if absolute value of real component of a next phasor is equal to absolute value of imaginary component of the next phasor; and

substituting components of the next phasors that have been detected as having the condition of equal absolute-valued with complex components that have square-root of one-half unity amplitudes, respectively.

17. The method of claim 15 further comprises employing a processor whose sampling rate that is at least twice the desired frequency.

Assignments (14)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CHANGE OF NAME Recorded Sep 22, 2017
From: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
To: NXP B.V.
Reel/Frame 043951/0436 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2017
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
Reel/Frame 043955/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2007
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 019719/0843 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2006
From: WITTIG, KARL RAYMOND; BURNS, GEOFFREY FRANCIS
To: KONINKLIJKE PHILIPS ELECTRONICS, N.V.
Reel/Frame 018152/0443 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 24, 2006
From: WITTIG, KARL RAYMOND; BURNS, GEOFFREY FRANCIS
To: KONINKLIJKE PHILIPS ELECTRONICS, N.V.
Reel/Frame 018152/0375 →