IP Library Granted Patent US 7,546,474
Granted Patent B2
US 7,546,474 · App. 10/221,718 · Granted Jun 9, 2009

Bus system with line control during the low-power phase

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Quick Facts
Patent No.
US 7,546,474
App. No.
10/221,718
Granted
Jun 9, 2009
Kind
B2
Abstract

In a bus system with a low-power phase, in which bus members are in a state of reduced current consumption and leave this state when the bus lines ( 1, 2 ) are active for a longer period than a predetermined time interval, the function of the bus in the low-power phase is monitored in that a first participant ( 3 ) cyclically transmits at least one pulse on the bus during the low-power phase, which pulse has a duration that is shorter than the predetermined time interval and is received and evaluated at least by a second bus member ( 4 ) for the purpose of monitoring the bus lines ( 1, 2 ).

Claims (5)

1. A bus system with a low-power phase, in which bus members are in a state of reduced current consumption and leave this state when bus lines are active for a longer period than a predetermined time interval, in which a first bus member cyclically transmits at least one pulse on the bus during a low-power phase, which pulse has a duration that is shorter than the predetermined time interval and is received and evaluated at least by a second bus member for the purpose of monitoring the bus lines, wherein the second bus member evaluates the pulse cyclically transmitted on the bus during a low-power phase cyclically evaluates bus lines via two comparators and a watchdog circuit, and supplies an alarm signal when the pulse cyclically transmitted on the bus during a low-power phase does not appear on the bus lines.

2. A bus system as claimed in claim 1 , wherein the second bus member supplies an alarm signal when it does not receive the pulse at least during one cycle.

3. A bus system as claimed in claim 1 , wherein for transmitting the pulse, the first bus member transmitting the pulse during a low-power phase is cyclically awakened by the watchdog circuit.

4. A bus system as claimed in claim 1 , wherein the bus system is a CAN bus.

5. A bus system as claimed in claim 4 , wherein the pulse cyclically transmitted on the bus during a low-power phase is transmitted on both bus lines.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 6, 2014
From: PARTNERS FOR CORPORATE RESEARCH INTERNATIONAL
To: FUTURE LINK SYSTEMS
Reel/Frame 032399/0965 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2013
From: NXP B. V.
To: PARTNERS FOR CORPORATE RESEARCH INTERNATIONAL
Reel/Frame 031334/0449 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2007
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 019719/0843 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 13, 2002
From: MUTH, MATTHIAS
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 014312/0049 →