IP Library Granted Patent US 7,105,383
Granted Patent B2
US 7,105,383 · App. 10/230,743 · Granted Sep 12, 2006

Packaged semiconductor with coated leads and method therefore

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Quick Facts
Patent No.
US 7,105,383
App. No.
10/230,743
Granted
Sep 12, 2006
Kind
B2
Abstract

A semiconductor die is housed in a package body. Leads, which are electrically coupled to the semiconductor die, extend from the package body and are for connecting to a printed circuit board or other device. The leads are coated with a material that protects the leads from oxidation. The coating is compatible with solder techniques that are commonly used to attach packaged semiconductors to a printed circuit board. In some examples, the coating is removable, after drying, at temperatures below one hundred eighty degrees Celsius. This allows for solder processes, which are typically at least 180° C., to remove the coating thereby exposing the leads, which has been protected from oxidation, so that it can be soldered to the printed circuit board. In some examples, the coating material includes an organic material. In some examples, the coating material is an organic solderability preservative (OSP).

Claims (49)

1. A method of making a packaged semiconductor, comprising:

encapsulating a semiconductor die together with a portion of a lead frame;

coating at least leads of the lead frame with a coating that, after drying, is removable from the leads by applying heat at a temperature below one hundred eighty degrees Celsius, wherein the coating includes an organic material; and

electrically testing the semiconductor die;

wherein the coating occurs before the electrical testing;

wherein the leads are formed from a metal material;

in the leads includes coating the leads with no metal material coating located between the coating and the metal material of the leads.

2. The method of claim 1 , wherein the coating comprises dipping the leads in a coating material that, after drying, is removable at temperatures below one hundred eighty degrees.

3. The method of claim 1 , wherein the coating comprises spraying the leads with a coating material that, after drying, is removable at temperatures below one hundred eighty degrees.

4. The method of claim 1 , further comprising:

attaching the packaged semiconductor to a circuit board, the attaching further includes:

soldering the leads to solderable surfaces of the circuit board by applying heat above one hundred eighty degrees Celsius.

5. The method of claim 1 , Further comprising cleaning the leads prior to the coating.

6. The method of claim 1 wherein the lead frame is a portion of a lead frame strip, the lead frame strip including a plurality of die sites, the method further comprising:

singulating the die sites, wherein the coating is performed after the singulating and before the testing.

7. The method of claim 1 wherein the coating includes an organic solderabiliity preservative (OSP).

8. The method of claim 1 wherein the metal material of the leads includes at least one of copper and alloy 42 .

9. A method of making a packaged semiconductor, comprising:

encapsulating a semiconductor die together with a portion of a lead frame;

coating at least leads of the lead frame with a coating that, after drying, is removable from the leads by applying heat at a temperature below one hundred eighty degrees Celsius;

electrically testing the semiconductor die;

wherein the coating is performed prior to the encapsulating;

wherein the coating includes an organic material;

wherein the leads are formed from a metal material;

wherein the coating the leads includes coating the leads with no metal material coating located between the coating and the metal material of the leads.

10. The method of claim 9 , wherein the coating occurs after the electrical testing.

11. The method of claim 9 , wherein the coating occurs before the electrical testing.

12. A method of making a packaged semiconductor, comprising:

encapsulating a semiconductor die together with a portion of a lead frame;

coating at least leads of the lead frame with a coating that, after drying, is removable from the leads at a temperature below one hundred eighty degrees Celsius; and

electrically testing the semiconductor die;

wherein the lead frame is a portion of a lead frame strip, the lead frame strip including a plurality of die sites, the method further comprising:

singulating the die sites, wherein the coating is performed before the singulating.

13. The method of claim 12 wherein:

the coating includes an organic material;

the leads are formed From a metal material;

the coating the leads includes coating the leads with no metal material coating located between the coating and the metal material of the leads.

14. The method of claim 12 wherein:

the coating includes an organic material;

the leads are Loaned from a metal material;

the coating the leads includes coating the leads with no metal material coating located between the coating and the metal material of the leads.

15. A method of making a packaged semiconductor, comprising:

encapsulating a semiconductor die together with a portion of a lead frame;

coating at least loads of the lead frame with a coating that, after drying, is removable from the leads by applying heat at a temperature below one hundred eighty degrees Celsius, wherein the coating includes an organic material; and

wherein the leads are formed from a metal material;

wherein the coating the leads includes coating the leads with no metal material coating located between the coating and the metal material of the leads.

16. The method of claim 15 wherein the lead frame is a portion of a lead frame strip, the lead frame strip including a plurality of die sites, the method further comprising:

singulating the die sites, wherein the coating is performed after the singulating.

17. The method of claim 15 wherein the metal material of the leads includes at least one of copper and alloy 42 .

Assignments (15)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 4, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NORTH STAR INNOVATIONS INC.
Reel/Frame 037694/0264 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →