IP Library › Assignment 037354/0225
Patent Assignment
Reel/Frame 037354/0225

PATENT RELEASE

Recorded: 2015-12-21 Received: 2015-12-21 Pages: 373
Assignor
Assignee
FREESCALE SEMICONDUCTOR, INC.
6501 WILLIAM CANNON DRIVE WEST, AUSTIN, TX, 78735, UNITED STATES
Covered Applications (100)
DEVICE HAVING DATA SHARING CAPABILITIES AND A METHOD FOR SHARING DATA
App. No. 12/161,524
→
LEADFRAME FOR A SEMICONDUCTOR DEVICE
App. No. 11/569,113
→
METHOD AND APPARATUS FOR REDUCED POWER CONSUMPTION ADC CONVERSION
App. No. 10/554,805
→
Method of Producing an Element Comprising an Electrical Conductor Encircled By Magnetic Material
App. No. 10/596,370
→
ARBITER FOR A SERIAL BUS SYSTEM
App. No. 11/568,405
→
Clock pulse generator apparatus with reduced jitter clock phase
App. No. 10/596,043
→
LOW IF RADIO RECEIVER
App. No. 10/596,910
→
SYSTEM AND METHOD FOR CONTROLLING THE TRANSMIT POWER OF A WIRELESS MODULE
PCTPCTUS2006060645
→
OPTICAL TO RADIO FREQUENCY DETECTOR
App. No. 10/504,010
→
METHOD FOR MAINTAINING TOPOGRAPHICAL UNIFORMITY OF A SEMICONDUCTOR MEMORY ARRAY
App. No. 11/556,368
→
METHOD OF IMPLEMENTING POLISHING UNIFORMITY AND MODIFYING LAYOUT DATA
App. No. 11/555,314
→
ONE TRANSISTOR DRAM CELL STRUCTURE
App. No. 11/554,851
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III-V COMPOUND SEMICONDUCTOR DEVICE WITH A SURFACE LAYER IN ACCESS REGIONS HAVING CHARGE OF POLARITY OPPOSITE TO CHANNEL CHARGE AND METHOD OF MAKING THE SAME
App. No. 11/554,859
→
ARRAY QUAD FLAT NO-LEAD PACKAGE AND METHOD OF FORMING SAME
App. No. 11/554,920
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METHOD FOR DAMAGE AVOIDANCE IN TRANSFERRING AN ULTRA-THIN LAYER OF CRYSTALLINE MATERIAL WITH HIGH CRYSTALLINE QUALITY
App. No. 11/554,847
→
SYSTEM AND METHOD FOR REPORTING CACHE COHERENCY STATE RETAINED WITHIN A CACHE HIERARCHY OF A PROCESSING NODE
App. No. 11/553,146
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STORAGE DEVICE HAVING LOW POWER MODE AND METHODS THEREOF
App. No. 11/553,022
→
MICROPAD FOR BONDING AND A METHOD THEREFOR
App. No. 11/552,821
→
SYSTEM AND METHOD FOR MEMORY ARRAY ACCESS WITH FAST ADDRESS DECODER
App. No. 11/552,817
→
METHOD OF MAKING SEMICONDUCTOR PACKAGE WITH REDUCED MOISTURE SENSITIVITY
App. No. 11/551,615
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SIGNAL DETECTION DEVICE AND METHODS THEREOF
App. No. 11/551,145
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MEMORY DEVICE HAVING SELECTIVELY DECOUPLEABLE MEMORY PORTIONS AND METHOD THEREOF
App. No. 11/550,900
→
SYSTEM HAVING A CARRY LOOK-AHEAD (CLA) ADDER
App. No. 11/550,835
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METHOD AND APPARATUS FOR UPDATING A COUNT VALUE
App. No. 11/550,558
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CONTROLLING THE BANDWIDTH OF AN ANALOG FILTER
App. No. 11/550,534
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SECURE COMMUNICATION PROTOCOL AND METHOD THEREFOR
App. No. 11/550,518
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INTEGRATED CIRCUIT CHIP WITH CONNECTIVITY PARTITIONING
App. No. 11/550,081
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TRIMMING CIRCUIT, ELECTRONIC CIRCUIT, AND TRIMMING CONTROL SYSTEM
App. No. 11/548,853
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SENSOR HAVING FREE FALL SELF-TEST CAPABILITY AND METHOD THEREFOR
App. No. 11/580,419
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TRANSMITTER AND RECEIVER GAIN CALIBRATION BY MEANS OF FEEDBACK IN A TRANSCEIVER
App. No. 10/521,417
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SCALING VIDEO PROCESSING COMPLEXITY BASED ON POWER SAVINGS FACTOR
App. No. 11/539,522
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ANTIFUSE ONE TIME PROGRAMMABLE MEMORY ARRAY AND METHOD OF MANUFACTURE
App. No. 11/538,862
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FAST ROTATOR WITH EMBEDDED MASKING AND METHOD THEREFOR
PCTPCTUS2006039180
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DYNAMIC SCANNABLE LATCH AND METHOD OF OPERATION
App. No. 11/538,639
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SEQUENCE-INDEPENDENT POWER-ON RESET FOR MULTI-VOLTAGE CIRCUITS
App. No. 11/538,295
→
DIGITAL CLOCK FREQUENCY MULTIPLIER
App. No. 11/538,304
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FEEDBACK REDUCTION FOR MIMO PRECODED SYSTEM BY EXPLOITING CHANNEL CORRELATION
App. No. 11/537,948
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MIMO PRECODING ENABLING SPATIAL MULTIPLEXING, POWER ALLOCATION AND ADAPTIVE MODULATION AND CODING
App. No. 11/537,902
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RESOURCE ALLOCATION IN MULTI DATA STREAM COMMUNICATION LINK
App. No. 11/541,710
→
METHOD AND DEVICE FOR OPERATING A PRECODED MIMO SYSTEM
App. No. 11/529,311
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PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING AN INDUCTOR
App. No. 11/540,614
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SYSTEM AND METHOD FOR TRANSLUCENT BRIDGING
App. No. 11/529,305
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TERMINATION STRUCTURES FOR SUPER JUNCTION DEVICES
App. No. 11/540,770
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METHODS AND APPARATUS FOR A MEMS GYRO SENSOR
App. No. 11/529,983
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DYNAMIC BRANCH PREDICTION USING A WAKE VALUE TO ENABLE LOW POWER MODE FOR A PREDICTED NUMBER OF INSTRUCTION FETCHES BETWEEN A BRANCH AND A SUBSEQUENT BRANCH
App. No. 11/536,173
→
UNIVERSAL SERIAL BUS TRANSMITTER
App. No. 10/598,352
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DATA PROCESSING SYSTEM HAVING CACHE MEMORY DEBUGGING SUPPORT AND METHOD THEREFOR
App. No. 11/536,085
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GENERALIZED CODEBOOK DESIGN METHOD FOR LIMITED FEEDBACK SYSTEMS
App. No. 11/536,280
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SOURCE SIDE INJECTION STORAGE DEVICE WITH SPACER GATES AND METHOD THEREFOR
App. No. 11/536,190
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SOURCE SIDE INJECTION STORAGE DEVICE WITH SPACER GATES AND METHOD THEREFOR
App. No. 11/536,099
→
SELF-TIMED MEMORY HAVING COMMON TIMING CONTROL CIRCUIT AND METHOD THEREFOR
App. No. 11/536,136
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CONTROLLED RELIABILITY IN AN INTEGRATED CIRCUIT
App. No. 11/536,342
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METHODS FOR OPTIMAL COLLABORATIVE MIMO-SDMA
App. No. 11/535,702
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METHODS FOR OPPORTUNISTIC MULTI-USER BEAMFORMING IN COLLABORATIVE MIMO-SDMA
App. No. 11/535,679
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SPLIT GATE MEMORY CELL METHOD
App. No. 11/535,345
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CIRCUIT FOR STORING INFORMATION IN AN INTEGRATED CIRCUIT AND METHOD THEREFOR
App. No. 11/534,715
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CAPACITOR ASSEMBLY WITH SHIELDED CONNECTIONS AND METHOD FOR FORMING THE SAME
App. No. 11/526,971
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HOT CARRIER INJECTION PROGRAMMABLE STRUCTURE INCLUDING DISCONTINUOUS STORAGE ELEMENTS AND SPACER CONTROL GATES IN A TRENCH AND A METHOD OF USING THE SAME
App. No. 11/525,747
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METHODS AND APPARATUS FOR SIMULATING DISTRIBUTED EFFECTS
App. No. 11/524,655
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Connection management system, method and program
App. No. 11/524,362
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MICROELECTRONIC ASSEMBLY AND METHOD FOR FORMING THE SAME
PCTPCTUS2006036638
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Data stream converter and data conversion circuit
App. No. 11/524,365
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SEMICONDUCTOR DEVICE HAVING NANO-PILLARS AND METHOD THEREFOR
PCTPCTUS2006036703
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MAGNETIC TUNNEL JUNCTION TEMPERATURE SENSORS AND METHODS
PCTPCTUS2006036634
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MAGNETIC TUNNEL JUNCTION TEMPERATURE SENSORS
PCTPCTUS2006036831
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METHOD OF MAKING STACKED DIE PACKAGE
App. No. 11/524,457
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HEAT SPREADER FOR SEMICONDUCTOR PACKAGE
App. No. 11/533,410
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METHOD AND SYSTEM FOR ACKNOWLEDGING FRAMES IN A COMMMUNICATION NETWORK
PCTPCTUS2006036473
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METHOD OF SYNCHRONIZING A WIRELESS DEVICE USING AN EXTERNAL CLOCK
PCTPCTUS2006036472
→
VOLTAGE CONTROLLED OSCILLATOR WITH AMPLITUDE CONTROL
PCTPCTUS2006036471
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DYADIC SPATIAL RE-SAMPLING FILTERS FOR INTER-LAYER TEXTURE PREDICTIONS IN SCALABLE IMAGE PROCESSING
App. No. 11/532,701
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DATA PROCESSOR AND METHODS THEREOF
App. No. 11/522,634
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LOCALIZED CONTENT ADAPTIVE FILTER FOR LOW POWER SCALABLE IMAGE PROCESSING
App. No. 11/532,327
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PERFORMANCE VARIATION COMPENSATING CIRCUIT AND METHOD
App. No. 11/532,295
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VIDEO INFORMATION PROCESSING SYSTEM WITH SELECTIVE CHROMA DEBLOCK FILTERING
App. No. 11/532,417
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LOW DROP-OUT DC VOLTAGE REGULATOR
App. No. 10/598,955
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SYSTEM AND METHOD FOR SYMBOLIC TIMING ANALYSIS OF CIRCUIT DESIGNS
App. No. 11/532,268
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MULTI-THREADED PROCESSOR ARCHITECTURE
PCTPCTUS2006035541
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INPUT CIRCUIT FOR RECEIVING A VARIABLE VOLTAGE INPUT SIGNAL AND METHOD
App. No. 11/530,181
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TRACE BUFFER WITH A PROCESSOR
App. No. 11/530,051
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METHOD FOR FABRICATING DUAL-METAL GATE DEVICE
App. No. 11/530,058
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NANOCRYSTAL NON-VOLATILE MEMORY CELL AND METHOD THEREFOR
App. No. 11/530,053
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NANOCRYSTAL NON-VOLATILE MEMORY CELL AND METHOD THEREFOR
App. No. 11/530,054
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Computer Processor Architecture Comprising Operand Stack and Addressable Registers
App. No. 11/470,732
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MULTI-THREADED PROCESSOR ARCHITECTURE
App. No. 11/470,721
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COMPUTER PROCESSOR CAPABLE OF RESPONDING WITH COMPARABLE EFFICIENCY TO BOTH SOFTWARE-STATE-INDEPENDENT AND STATE-DEPENDENT EVENTS
App. No. 11/470,728
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Variable switching point circuit
App. No. 11/470,342
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FLOATING POINT NORMALIZATION AND DENORMALIZATION
PCTPCTUS2006034774
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PHASE LOCKED LOOP FILTER
App. No. 10/561,556
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PERFORMING AN N-BIT WRITE ACCESS TO AN MXN-BIT-ONLY PERIPHERAL
PCTPCTUS2006034775
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METHOD FOR POWERING AN ELECTRONIC DEVICE AND CIRCUIT
App. No. 11/469,084
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SYSTEM AND METHOD FOR DEVICE TESTING
App. No. 11/513,365
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Direct memory access device and methods
App. No. 11/513,639
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STORAGE CIRCUIT WITH EFFICIENT SLEEP MODE AND METHOD
App. No. 11/469,074
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METHOD OF FORMING CRACK ARREST FEATURES IN EMBEDDED DEVICE BUILD-UP PACKAGE AND PACKAGE THEREOF
App. No. 11/469,158
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METHOD OF MAKING SELF-ALIGNED SPLIT GATE MEMORY CELL
App. No. 11/469,163
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LEVEL SHIFTING CIRCUIT
App. No. 11/468,815
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DISTRIBUTED ELECTROSTATIC DISCHARGE PROTECTION CIRCUIT WITH VARYING CLAMP SIZE
App. No. 11/513,638
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CIRCUITRY FOR LATCHING
App. No. 11/468,521
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MULTIPLE SENSOR THERMAL MANAGEMENT FOR ELECTRONIC DEVICES
App. No. 11/512,483
→