IP Library Granted Patent US 6,976,235
Granted Patent B2
US 6,976,235 · App. 10/246,089 · Granted Dec 13, 2005

Region-based voltage drop budgets for low-power design

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Quick Facts
Patent No.
US 6,976,235
App. No.
10/246,089
Granted
Dec 13, 2005
Kind
B2
Abstract

A method and apparatus for assigning a set of region-based voltage drop budgets to an integrated circuit is provided. Further, a method for partitioning an integrated circuit into optimal voltage drop regions includes analyzing the integrated circuit for worst-case voltage drop data. The worst-case voltage drop data is used to partition the integrated circuit into a set of voltage drop regions, wherein each voltage drop region is assigned a region-based voltage drop budget. The region-based voltage drop budget assigned to a particular voltage drop region is based on a worst-case voltage drop experienced by that voltage drop region.

Claims (30)

1. A method for assigning a set of region-based voltage drop budgets to an integrated circuit, comprising:

determining a voltage drop criteria for at least a portion of the integrated circuit;

analyzing the at least a portion of the integrated circuit for worst-case voltage drop data using the voltage drop criteria;

based on the worst-case voltage data, partitioning the at least a portion of the integrated circuit into at least one of a set of contour-based voltage drop regions, a set of block-based voltage drop regions, a set of non-uniformly sized voltage drop regions, and a set of uniformly-sized voltage drop regions; and

assigning to at least one of the voltage drop regions a region-based voltage drop budget based on a worst-case voltage drop seen by the at least one of the voltage drop regions.

2. The method of claim 1 , wherein dimensions of each of the set of contour-based voltage drop regions are determined by a full-grid worst-case voltage drop analysis of the integrated circuit.

3. The method of claim 1 , wherein dimensions of each of the set of block-based voltage drop regions are based on a dimension and a location of a subsystem of the integrated circuit.

4. The method of claim 1 , wherein dimensions of each of the set of non-uniformly sized voltage drop regions are based on a density of a particular type of logic component disposed on the integrated circuit.

5. The method of claim 1 , wherein dimensions of each of the set of uniformly sized voltage drop regions are based on a bump grid pattern of the integrated circuit.

6. A method for designing a power grid of an integrated circuit, comprising:

determining a voltage drop criteria for at least a portion of the integrated circuit;

analyzing the at least a portion of the integrated circuit for worst-case voltage drop data using the voltage drop criteria;

based on the worst-case voltage drop data, partitioning the at least a portion of the integrated circuit into a set of contour based voltage drop regions, a set of block-based voltage drop regions, a set of non-uniformly sized voltage drop regions, and a set of uniformly-sized voltage drop regions; and

assigning to at least one of the voltage drop regions a region-based voltage drop budget based on a worst-case voltage drop seen by the at least one of the voltage drop regions; and

designing the power grid to meet a predefined power dissipation requirement using the region-based voltage drop budget.

7. The method of claim 6 , wherein designing the power grid comprises:

designating a supply voltage for the least one of the voltage drop regions using the region-based voltage drop budget; and

configuring the power grid to output the supply voltage to the at least one of the voltage drop regions.

8. A computer system, comprising:

a processor;

a memory; and

instructions residing in the memory executable in the processor for

determining a voltage drop criteria for at least a portion of an integrated circuit;

analyzing the at least a portion of the integrated circuit for worst-case voltage drop data using the voltage drop criteria;

based on the worst-case voltage drop data, partitioning the at least a portion of the integrated circuit into at least one of a set of contour-based voltage drop regions, a set of block-based voltage drop regions, a set of non-uniformly sized voltage drop regions, and a set of uniformly-sized voltage drop regions; and

assigning to a voltage drop region a region-based voltage drop budget based on a worst-case voltage drop seen by the voltage drop region.

9. The computer system of claim 8 , further comprising instructions for redesigning the power grid to meet the predefined power dissipation requirement using the region-based voltage drop budgets.

10. The computer system of claim 9 , wherein the instructions for redesigning the power grid comprise instructions for:

designating a supply voltage for the voltage drop region using the region-based voltage drop budget; and

adapting the power grid to output the supply voltage to the voltage drop region.

Assignments (1)
MERGER AND CHANGE OF NAME Recorded Dec 14, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037280/0159 →