IP Library Assignment 037280/0159
Patent Assignment
Reel/Frame 037280/0159

Merger and Change of Name

Recorded: 2015-12-14 Pages: 11
Assignors
ORACLE USA, INC.
Executed: 2010-02-12
SUN MICROSYSTEMS, INC.
Executed: 2010-02-12
ORACLE AMERICA, INC.
Executed: 2010-02-12
Assignee
ORACLE AMERICA, INC.
500 ORACLE PARKWAY, REDWOOD SHORES, CALIFORNIA, 94065
Covered Properties (100)
Latency-Reducing Bandwidth-Prioritization for Network Servers and Clients
Patent: 6,968,379 →
Application: 08/865,962 →
Publication: US 2001/0003830
Testing Device Driver Hardening
Patent: 6,971,048 →
Application: 09/097,468 →
System and Method for Providing Software Upgrades to a Vehicle
Patent: 6,975,612 →
Application: 09/332,348 →
Web-Based Enterprise Management with Multiple Repository Capability
Patent: 6,976,262 →
Application: 09/333,591 →
Method and System for Facilitating Relocation of Devices on a Network
Patent: 6,977,929 →
Application: 09/457,889 →
System and Method for Separating Addresses from the Delivery Scheme in a Virtual Private Network
Patent: 6,970,941 →
Application: 09/458,043 →
System and Method for Managing a Scalable List of Items for Display
Patent: 6,959,425 →
Application: 09/464,021 →
Mechanism for Automatic Synchronization of Scripting Variables
Patent: 6,961,929 →
Application: 09/471,072 →
Apparatus and Method for Scalable Buffering in a Digital Video Decoder
Patent: 6,965,641 →
Application: 09/517,804 →
Switched Network for Low Latency Communication
Patent: 6,975,626 →
Application: 09/540,730 →
Source Synchronous Link Integrity Validation
Patent: 6,965,648 →
Application: 09/565,193 →
Transaction Data Structure for Process Communications Among Network-Distributed Applications
Patent: 6,971,096 →
Application: 09/574,335 →
Resource Adapter and Xml Descriptor for Use in a Client Server Environment Utilizing an Enterprise Information System
Patent: 6,976,061 →
Application: 09/577,188 →
Method and Apparatus for Implementing Concurrently Running Jobs on an Extended Virtual Machine Using Different Heaps Managers
Patent: 6,971,097 →
Application: 09/591,172 →
Inexpensive Secure on-Line Certification Authority System and Method
Patent: 6,973,569 →
Application: 09/608,264 →
System and Method for Monitoring and Managing System Assets and Asset Configuratiions
Patent: 6,973,491 →
Application: 09/635,823 →
Method and Apparatus for Facilitating Use of a Pre-Shared Secret Key with Identity Hiding
Patent: 6,975,729 →
Application: 09/640,465 →
Mechanism and Apparatus for Security of Newly Spawned Repository Spaces in a Distributed Computing Environment
Patent: 6,973,493 →
Application: 09/653,241 →
Method and Apparatus to Discover Services and Negotiate Capabilities
Patent: 6,970,869 →
Application: 09/653,451 →
Methods and Apparatus for Numeric Constant Value Inlining in Virtual Machines
Patent: 6,978,456 →
Application: 09/703,356 →
Methods and Apparatus for Efficiently Accessing Periodically Broadcast Data
Patent: 6,976,268 →
Application: 09/733,609 →
Publication: US 2002/0116711
Techniques for Transmission of Message Fragments Between Object Request Brokers
Patent: 6,961,939 →
Application: 09/777,261 →
Publication: US 2002/0107997
Mechanism for Reconfiguring a Server Without Incurring Server Down Time
Patent: 6,976,065 →
Application: 09/792,805 →
Publication: US 2002/0120724
System and Method for Accessing Functionality of a Backend System from an Application Server
Patent: 6,978,461 →
Application: 09/792,810 →
Publication: US 2002/0120787
Low-Complexity, High Accuracy Model of a Cpu Anti-Resonance System
Patent: 6,975,977 →
Application: 09/819,198 →
Publication: US 2002/0143509
Method for Triggering Flow Control Packets
Patent: 6,975,593 →
Application: 09/824,964 →
Publication: US 2002/0150049
Method, System, and Program for Enabling Communication Between Devices Using Different Address Formats
Patent: 6,961,775 →
Application: 09/826,081 →
Publication: US 2002/0147817
Configuring System Units Using on-Board Class Information
Patent: 6,970,948 →
Application: 09/828,494 →
Publication: US 2002/0023181
Method and Apparatus for Rewriting Bytecodes to Minimize Runtime Checks
Patent: 6,978,448 →
Application: 09/841,759 →
Specialized Heaps for Creation of Objects in Object-Oriented Environments
Patent: 6,959,430 →
Application: 09/852,410 →
Publication: US 2004/0015850
Method and System for Answering Online Certificate Status Protocol (Ocsp) Requests Without Certificate Revocation Lists (Crl)
Patent: 6,970,862 →
Application: 09/867,648 →
Publication: US 2002/0184182
Networked Video Projector Apparatus and Method of Projecting a Video Frame on a Video Projector
Patent: 6,977,693 →
Application: 09/879,770 →
Publication: US 2002/0186176
Object Band Customization of Java Runtime Environments
Patent: 6,964,033 →
Application: 09/886,440 →
Publication: US 2003/0018959
Method for Recording an Audio Broadcast by User Preference
Patent: 6,961,549 →
Application: 09/921,391 →
Publication: US 2003/0028613
Configurable Mechanism and Abstract Api Model for Directory Operations
Patent: 6,970,873 →
Application: 09/922,190 →
Publication: US 2003/0028752
Processor State Reintegration Using Bridge Direct Memory Access Controller
Patent: 6,961,826 →
Application: 09/939,277 →
Publication: US 2002/0065996
Precise Error Reporting
Patent: 6,965,571 →
Application: 09/939,973 →
Publication: US 2003/0039209
Method and Apparatus for Identifying Processing Units to a Network Using Network Addresses Obtained from Removable Data Carriers
Patent: 6,968,378 →
Application: 09/943,181 →
Publication: US 2002/0083176
Method and Apparatus for Customizing Java Api Implementations
Patent: 6,980,979 →
Application: 09/956,713 →
Publication: US 2003/0056029
Registry Service for Use in a Distributed Processing Framework System and Methods for Implementing the Same
Patent: 6,961,937 →
Application: 09/967,630 →
Publication: US 2003/0120829
Rating Apparatus and Method for Evaluating Bugs
Patent: 6,978,441 →
Application: 09/970,281 →
Publication: US 2003/0066049
Replication Architecture for a Directory Server
Patent: 6,973,463 →
Application: 09/993,940 →
Publication: US 2003/0088587
Sign Generation Bypass Path to Aligner for Reducing Signed Data Load Latency
Patent: 6,965,985 →
Application: 09/994,479 →
Publication: US 2003/0101332
Representation of Java Data Types in Virtual Machines
Patent: 6,961,933 →
Application: 09/999,520 →
Publication: US 2003/0079049
Victim Invalidation
Patent: 6,961,827 →
Application: 10/011,115 →
Publication: US 2003/0093722
System and Method for Forcing Floating Point Status Information to Selected Values
Patent: 6,970,898 →
Application: 10/035,583 →
Publication: US 2003/0005012
System and Method for Generating an Integer Part of a Logarithm of a Floating Point Operand
Patent: 6,961,744 →
Application: 10/035,585 →
Publication: US 2002/0178197
System and Method for Extracting the High Part of a Floating Point Operand
Patent: 6,976,050 →
Application: 10/036,133 →
Publication: US 2002/0178201
Method, System, and Program for Discovering Devices Communicating Through a Switch
Patent: 6,965,559 →
Application: 10/039,807 →
Publication: US 2003/0076788
Method and Apparatus for Solving an Equality Constrained Global Optimization Problem
Patent: 6,961,743 →
Application: 10/042,907 →
Publication: US 2003/0130970
Displaying Information on Keys of a Keyboard
Patent: 6,961,048 →
Application: 10/052,114 →
Publication: US 2003/0132915
Dynamic Trap Table Interposition for Efficient Collection of Trap Statistics
Patent: 6,968,547 →
Application: 10/060,883 →
Publication: US 2003/0145251
Globally Clocked Interfaces Having Reduced Data Path Length
Patent: 6,961,861 →
Application: 10/085,184 →
Publication: US 2003/0160797
Arbitration Scheme for Efficient Parallel Processing
Patent: 6,963,342 →
Application: 10/085,432 →
Publication: US 2003/0160794
Method and Apparatus Solving Problems Having Interval Parameters
Patent: 6,976,048 →
Application: 10/095,184 →
Publication: US 2003/0172095
Method for Reduction of Possible Renderable Graphics Primitive Shapes for Rasterization
Patent: 6,975,317 →
Application: 10/096,090 →
Publication: US 2003/0174133
Method and Apparatus for Merging Data Graphs Using Data Identity Control
Patent: 6,980,998 →
Application: 10/104,172 →
Publication: US 2003/0182294
System and Method for Determining Relevancy of Query Responses in a Distributed Network Search Mechanism
Patent: 6,961,723 →
Application: 10/106,398 →
Publication: US 2003/0158839
Method and Apparatus for Adaptive Local Image Quantification Verification
Patent: 6,961,468 →
Application: 10/113,954 →
Publication: US 2003/0185447
Mechanism for Migrating a File Sequence with Versioning Information from One Workspace to Another
Patent: 6,973,465 →
Application: 10/133,011 →
Publication: US 2003/0204531
Service Mapping Method of Enterprise Application Modeling and Development for Multi-Tier Service Environments
Patent: 6,968,535 →
Application: 10/137,756 →
Publication: US 2003/0182461
Computing Apparatus with Cooling Fan
Patent: 6,975,509 →
Application: 10/146,849 →
Publication: US 2003/0214782
Device Centric Discovery and Configuration for Fabric Devices
Patent: 6,965,951 →
Application: 10/147,591 →
Publication: US 2003/0217212
Software Hardening Utilizing Recoverable, Correctable, and Unrecoverable Fault Protocols
Patent: 6,961,874 →
Application: 10/151,349 →
Publication: US 2003/0217309
System with a Directory Based Coherency Protocol and Split Ownership and Access Right Coherence Mechanism
Patent: 6,973,545 →
Application: 10/184,171 →
Publication: US 2004/0003180
System with Virtual Address Networks and Split Ownership and Access Right Coherence Mechanism
Patent: 6,970,979 →
Application: 10/184,174 →
Publication: US 2004/0003181
System with Multicast Invalidations and Split Ownership and Access Right Coherence Mechanism
Patent: 6,970,980 →
Application: 10/184,175 →
Publication: US 2004/0003183
Power Grid and Bump Pattern with Reduced Inductance and Resistance
Patent: 6,961,247 →
Application: 10/184,289 →
Publication: US 2004/0001326
Error Detection/Correction Code Which Detects and Corrects Memory Module/Transmitter Circuit Failure
Patent: 6,976,194 →
Application: 10/184,674 →
Publication: US 2004/0003336
Error Detection/Correction Code Which Detects and Corrects Component Failure and Which Provides Single Bit Error Correction Subsequent to Component Failure
Patent: 6,973,613 →
Application: 10/185,265 →
Publication: US 2004/0003337
Software Application Test Coverage Analyzer
Patent: 6,978,401 →
Application: 10/211,097 →
Publication: US 2004/0025088
Removable Media
Patent: 6,980,427 →
Application: 10/215,664 →
Publication: US 2003/0048614
Computer System with Virtual Memory and Paging Mechanism
Patent: 6,970,991 →
Application: 10/241,178 →
Publication: US 2003/0088752
Accuracy of Timing Analysis Using Region-Based Voltage Drop Budgets
Patent: 6,971,079 →
Application: 10/245,972 →
Publication: US 2004/0054975
Region-Based Voltage Drop Budgets for Low-Power Design
Patent: 6,976,235 →
Application: 10/246,089 →
Publication: US 2004/0054979
Mechanism for Implementing Server-Side Pluglets
Patent: 6,973,480 →
Application: 10/256,673 →
Publication: US 2004/0221002
Low Overhead Snapshot in a Storage Array Using a Tree-of-Slabs Metadata
Patent: 6,978,353 →
Application: 10/273,634 →
Publication: US 2004/0078533
Coherence Message Prediction Mechanism and Multiprocessing Computer System Employing the Same
Patent: 6,973,547 →
Application: 10/298,244 →
Publication: US 2003/0154351
Method for Predicting Whether a Failure of an Electrical Device May Occur
Patent: 6,973,391 →
Application: 10/308,471 →
Publication: US 2004/0107392
Lock-Free, Parallel Remembered Sets
Patent: 6,965,905 →
Application: 10/325,003 →
Publication: US 2004/0122874
Interconnecting Device for a Data Processing System
Patent: 6,964,524 →
Application: 10/325,165 →
Publication: US 2004/0120652
Method and Apparatus for Predicting Hot Spots in Cache Memories
Patent: 6,976,125 →
Application: 10/354,329 →
Publication: US 2004/0148469
Apparatus and Method for Dual Access to a Banked and Pipelined Data Cache Memory Unit
Patent: 6,973,557 →
Application: 10/358,023 →
Publication: US 2004/0153598
Method and Apparatus Involving a Hierarchy of Field Replaceable Units Containing Stored Data
Patent: 6,973,412 →
Application: 10/365,805 →
Publication: US 2004/0162945
Generation of Native Code to Enable Page Table Access
Patent: 6,961,839 →
Application: 10/365,861 →
Publication: US 2004/0162960
System, Method and Apparatus for Improving Sense Amplifier Performance Characteristics Using Process Feedback
Patent: 6,975,144 →
Application: 10/367,340 →
Publication: US 2004/0160243
Dynamically Adjusting a Number of Rendering Passes in a Graphics System
Patent: 6,975,322 →
Application: 10/383,234 →
Publication: US 2003/0179208
System Level Reduction of Clock Skew Based on Local Thermal Profiling
Patent: 6,973,398 →
Application: 10/385,346 →
Publication: US 2004/0181354
Insertion and Extraction Mechanism for Circuit Boards
Patent: 6,975,519 →
Application: 10/417,634 →
Publication: US 2004/0209502
Supporting Non-Hotswap 64-Bit Cpci Cards in a Ha System
Patent: 6,976,113 →
Application: 10/435,733 →
Publication: US 2004/0225802
Fan Holder and Components Cooling Duct Assembly
Patent: 6,970,353 →
Application: 10/448,247 →
Publication: US 2004/0240175
Distributed Diode Fault Check
Patent: 6,967,487 →
Application: 10/455,753 →
Publication: US 2004/0042145
Method and Apparatus for Reducing Power Consumption Due to Gate Leakage During Sleep Mode
Patent: 6,970,034 →
Application: 10/616,048 →
Single Rank Memory Module for Use in a Two-Rank Memory Module System
Patent: 6,961,281 →
Application: 10/661,872 →
Publication: US 2005/0058001
Using and Generating Finite State Machines to Monitor System Status
Patent: 6,968,291 →
Application: 10/702,150 →
Reduced Delay Power Fail-Safe Circuit
Patent: 6,965,250 →
Application: 10/716,690 →
Pulse Shaper Circuit for Sense Amplifier Enable Driver
Patent: 6,977,530 →
Application: 10/771,700 →
Method and Apparatus for Amplifying Capacitively Coupled Inter-Chip Communication Signals
Patent: 6,972,596 →
Application: 10/772,106 →
High Speed Semi-Dynamic Flip-Flop Circuit
Patent: 6,972,605 →
Application: 10/811,436 →
Mechanism for Graphical Test Exclusion
Patent: 6,980,916 →
Application: 10/834,488 →