Generation of native code to enable page table access
View Patent ↗A system for generating native code of a software application includes a page table indexing a plurality of pages using a page pointer, wherein the page pointer includes an address of at least one of the plurality of pages, a memory cache including a page table cache and a page cache, and a statically-generated executable code to obtain data on at least one of the plurality of pages using the memory cache.
1. A system for generating native code of a software application, comprising:
a page table indexing a plurality of pages using a page pointer, wherein the page pointer comprises an address of at least one of the plurality of pages;
a memory cache comprising a page table cache and a page cache, wherein the page cache comprises a last-accessed-page cache and a next-to-last-accessed-page cache; and
a statically-generated executable code to obtain data on at least one of the plurality of pages using the memory cache.
2. The system of claim 1 , further comprising:
a compiler generating the statically-generated executable code.
3. The system of claim 1 , wherein the page table cache comprises an address of the page table.
4. The system of claim 3 , wherein the page table cache is a register.
5. The system of claim 1 , wherein the last-accessed-page cache and the next-to-last-accessed-page cache are registers.
6. The system of claim 1 , wherein the page table and the plurality of pages are located in a memory.
7. The system of claim 1 , wherein the address of at least one of the plurality of pages is obtained from the page cache.
8. A method for generating native code of a software application, comprising:
calculating an address of a page;
setting a pointer to the address of the page, wherein setting the pointer comprises reading the pointer from a last-page-accessed cache or from a next-to-last-page-accessed cache;
generating an instruction for the software application to obtain the address of the page using the pointer; and
executing the instruction to obtain data from the page at the obtained address.
9. The method of claim 8 , further comprising:
generating the instruction using a compiler.
10. The method of claim 8 , wherein setting the pointer comprises:
calculating a page number of the page;
obtaining an address of a page table; and
reading the address from the page table using the page number.
11. The method of claim 8 , further comprising:
updating the last-page-accessed cache.
12. The method of claim 8 , further comprising:
updating the next-to-last-page-accessed cache.
13. The method of claim 8 , wherein executing the instruction comprises:
loading the address of the page into a register; and
reading the data using the address in the register.
14. A computer system for enhancing performance of a software application, comprising:
a processor;
a memory;
a storage device; and
software instructions stored in the memory for enabling the computer system to perform:
calculating an address of a page in the memory;
setting a pointer to the address of the page, wherein setting the pointer comprises reading the pointer from a last-page-accessed cache or from a next-to-last-page-accessed cache;
generating an instruction for the software application to obtain the address of the page using the pointer; and
executing the instruction to obtain data from the page at the obtained address.
15. The computer system of claim 14 , further comprising software instruction to perform:
generating the instruction using a compiler.
16. The computer system of claim 14 , wherein setting the pointer comprises:
calculating a page number of the page;
obtaining an address of a page table; and
reading the address from the page table using the page number.
17. The computer system of claim 14 , further comprising:
updating the last-page-accessed cache.
18. The computer system of claim 14 , further comprising:
updating the next-to-last-page-accessed cache.
19. The computer system of claim 14 , wherein executing the instruction comprises:
loading the address of the page into a register; and
reading the data using the address in the register.
20. An apparatus for enhancing performance of a software application, comprising:
means for calculating an address of a page;
means for setting a pointer to the address of the page, wherein setting the pointer comprises reading the pointer from a last-page-accessed cache or from a next-to-last-page-accessed cache;
means for generating an instruction for the software application to obtain the address of the page using the pointer; and
means for executing the instruction to obtain data from the page at the obtained address.