Method for creation of a very narrow emitter feature
View Patent ↗A double-polysilicon, self-aligned bipolar transistor has a collector region formed in a doped semiconductor substrate, an intrinsic counterdoped base formed on the surface of the substrate and a doped emitter formed in the surface of the intrinsic base. Form an etch stop dielectric layer over the intrinsic base layer above the collector. Form a base contact layer of a conductive material over the etch stop dielectric layer and the intrinsic base layer. Form a second dielectric layer over the base contact layer. Etch a wide window through the dielectric layer and the base contact layer stopping the etching of the window at the etch stop dielectric layer. Form an island or a peninsula narrowing the wide window leaving at least one narrowed window within the wide window. Form sidewall spacers in the either the wide window or the narrowed window. Fill the windows with doped polysilicon to form an extrinsic emitter. Form an emitter below the extrinsic emitter in the surface of the intrinsic base.
1. A method for forming a double-polysilicon, self-aligned bipolar transistor having a collector region formed in a doped semiconductor substrate, an intrinsic counterdoped base formed on the surface of the substrate and a doped emitter formed in the surface of the intrinsic base, comprising the steps of:
forming an etch stop dielectric layer over the top surface of the intrinsic base layer above the collector region in the substrate;
forming a base contact layer of a conductive material over the etch stop dielectric layer and the intrinsic base layer;
forming a second dielectric layer over the base contact layer;
etching a wide window extending through the dielectric layer and the base contact layer and stopping the etching of the window at the etch stop dielectric layer;
forming a narrowing structure in the wide window leaving the narrowing structure with at least one narrowed window within the wide window;
filling the narrowed window and the remainder of the wide window with doped polysilicon to form an extrinsic emitter; and
forming an emitter below the extrinsic emitter in the surface of the intrinsic base.
2. The method of claim 1 wherein dual narrowed windows are formed separated by the narrowing structure which comprises an island formed on the etch stop layer between the dual narrowed windows with dual extrinsic emitters juxtaposed with the island.
3. The method of claim 2 wherein the island comprises a dielectric material.
4. The method of claim 2 wherein the island comprises polysilicon.
5. The method of claim 2 wherein the island comprises doped polysilicon.
6. The method of claim 1 wherein a single asymmetric narrowed window is formed by the narrowing structure which comprises a peninsula formed on the etch stop layer juxtaposed with the extrinsic emitter.
7. The method of claim 6 wherein the peninsula comprises a dielectric material.
8. The method of claim 6 wherein the peninsula comprises polysilicon.
9. The method of claim 6 wherein the peninsula comprises doped polysilicon.
10. A method for forming a double-polysilicon, self-aligned bipolar transistor having a collector region formed in a doped semiconductor substrate, an intrinsic counterdoped base formed on the surface of the substrate and a doped emitter formed in the surface of the intrinsic base, comprising the steps of:
forming an etch stop silicon oxide layer over the top surface of the intrinsic base layer above the collector region in the substrate;
forming a base contact layer of doped polysilicon over the etch stop dielectric layer and the intrinsic base layer;
forming a second dielectric layer composed of silicon oxide over the base contact layer;
etching a wide window extending through the dielectric layer and the base contact layer and stopping the etching of the window at the etch stop dielectric layer;
forming a conformal layer of a thin film of a conformal dielectric material over the second dielectric layer partially filling the wide window and leaving a depression,
forming a mask in the depression,
etching exposed portions of the conformal dielectric material aside from the mask to form a narrowing structure in the wide window leaving the narrowing structure juxtaposed with at least one narrowed window within the wide window;
forming sidewall spacers on the sides of the wide window before or after forming the narrowing structure;
filling the narrowed window and the remainder of the wide window with doped polysilicon to form an extrinsic emitter and an emitter contact; and
forming an emitter below the extrinsic emitter in the surface of the intrinsic base.
11. The method of claim 10 wherein dual narrowed windows are formed separated by the narrowing structure which comprises an island formed on the etch stop layer between the dual narrowed windows with dual extrinsic emitters juxtaposed with the island.
12. The method of claim 11 wherein the island comprises a dielectric material.
13. The method of claim 11 wherein the island comprises polysilicon.
14. The method of claim 11 wherein the island comprises doped polysilicon.
15. The method of claim 10 wherein a single asymmetric narrowed window is formed by the narrowing structure which comprises a peninsula formed on the etch stop layer juxtaposed with the extrinsic emitter.
16. The method of claim 15 wherein the narrowing structure is an island and a peninsular structure composed of a dielectric and an island composed of a dielectric material selected from the group consisting of silicon oxide, silicon nitride and polysilicon.
17. The method of claim 15 wherein the narrowing structure is a peninsular structure composed of a dielectric and an island composed of a dielectric material selected from the group consisting of silicon oxide and silicon nitride.