Patent Application
Utility
App. No. 10/256,027
· Confirmation No. 3001
METHOD OF PRODUCING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND THE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Abandoned -- Failure to Pay Issue Fee
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2002-09-27 | TRNA |
Transmittal of New Application | 4 | View | |
| 2002-09-27 | A.PE |
Preliminary Amendment | 2 | View | |
| 2002-09-27 | SPEC |
Specification | 63 | View | |
| 2002-09-27 | CLM |
Claims | 15 | View | |
| 2002-09-27 | ABST |
Abstract | 1 | View | |
| 2002-09-27 | DRW |
Drawings-only black and white line drawings | 50 | View | |
| 2002-09-27 | OATH |
Oath or Declaration filed | 4 | View |
Inventors
Hiroyuki Enomoto
Mitaka, JAPAN
Hiroyuki Maruyama
Ome, JAPAN
Makoto Yoshida
Suwon-Si, KOREA, REPUBLIC OF
Classification
USPC
257/288
H10D64/011
H10W20/076
H10B12/0335
H10B12/05
H10B12/485
H10W20/069
Prosecution
- Examiner
- QUACH, TUAN N
- Art Unit
- 2814
- Docket No.
- XA-9604A
- Confirmation No.
- 3001
Foreign Priority
2001-005460
·
2001-01-12
·
JAPAN
Publication
- Pub. No.
- US20030045065A1
- Pub. Date
- 2003-03-06
from
HITACHI, LTD.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2003-12-11
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Quick Facts
- App. No.
- 10/256,027
- Filed
- 2002-09-27
- Pub. No.
- US20030045065A1
- Examiner
- QUACH, TUAN N
- Art Unit
- 2814
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