IP Library Granted Patent US 7,634,624
Granted Patent B2
US 7,634,624 · App. 10/256,891 · Granted Dec 15, 2009

Memory system for data storage and retrieval

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Quick Facts
Patent No.
US 7,634,624
App. No.
10/256,891
Granted
Dec 15, 2009
Kind
B2
Abstract

According to a first aspect of an embodiment of the invention, there is provided a method of data storage and retrieval for use in a solid state memory system, having a non-volatile memory, wherein data is written to the non-volatile memory in the form of at least one logical sector the method comprising: monitoring the logical sector data which is to be written to the non-volatile memory, detecting the presence of a pattern in the logical sector data, upon detecting a repetitive pattern recording the repetitive pattern of the logical sector in a sector address table in the non-volatile memory without making a record of the logical sector data in the non- volatile memory.

Claims (34)

1. A method of data storage and retrieval for use in a solid state memory system in placement of conventional hard disk, having a non-volatile memory, wherein data is written to the non-volatile memory in the form of at least one sector, the method comprising:

organizing the non-volatile memory into physical sectors for storage of sector data, a physical sector including data from a host and overhead data;

receiving a sector write command indicative of writing logical sector data of a logical sector;

receiving the logical sector data for writing thereof into a previously-erased physical sector of the non-volatile memory, wherein the logical sector data comprises two or more data portions;

monitoring the logical sector data which is to be written to the non-volatile memory;

detecting the presence of a repetitive pattern in the logical sector data if all data portions of the logical sector data have the same value;

upon detecting a repetitive pattern, recording one data portion of the logical sector data in a sector address table in the non-volatile memory system without recording any data portions of the logical sector data in a physical sector in the non-volatile memory; and

erasing an obsolete copy of the logical sector data from a physical sector in the non-volatile memory.

2. The method of data storage as recited in claim 1 , further including marking the corresponding logical sector as being erased after the one data portion of the logical sector has been recorded in the sector address table.

3. The method of data storage as recited in claim 1 , further comprising:

upon detecting that the logical sector data does not contain a repetitive pattern, recording all data portions of the logical sector data in a physical sector in the non-volatile memory.

4. A non-volatile memory, in place of a conventional hard disk, organized into sectors to which data is written into at least one logical sector, the non-volatile memory comprising:

means for receiving a sector write command indicative of writing a logical sector data of a logical sector and receiving the logical sector data for writing thereof into a previously-erased physical sector of the non-volatile memory;

means for monitoring logical sector data which is to be written to the non-volatile memory;

means for detecting the presence of a repetitive pattern in the logical sector data, wherein a repetitive pattern is indicated by the presence of the same pattern value in each of two or more data portions of the logical sector data;

recording means for recording the pattern value of the logical sector data, and means for writing to the recording means;

means for marking a corresponding logical sector as being erased; and

means for erasing an obsolete copy of the logical sector data in the non-volatile memory wherein upon detection of a repetitive pattern, a recording of the repetitive pattern value of the logical sector data is made to the recording means without writing any data portion of the logical sector data to the corresponding physical sector location in the non-volatile memory.

5. The non-volatile memory as recited in claim 4 , further comprising:

wherein upon detecting that the logical sector data does not contain a repetitive pattern, a recording of all data portions of the logical sector data is made to the corresponding physical sector location in the non-volatile memory.

6. A non-volatile memory system comprising:

a controller coupled between a host and a non-volatile memory for transferring sector data therebetween, the non-volatile memory organized into physical sectors for storage of sector data and the controller including,

a host interface control block, a logical interface coupled to the host interface control block, a microprocessor, a flash interface control block coupled to a physical interface, a Read Only Memory (ROM) and a synchronous random access memory (SRAM), the host interface control block providing a path to the controller for flow of sector data to and from the host, a pattern detection means for comparing data portions of sector data received from the host with each other, upon receiving a sector write command from the host and indicating to the microprocessor whether the host-provided sector data has a repetitive pattern of its data portions, the microprocessor receiving a pattern value of a data portion of the host-provided sector data for writing to a sector address table of the non-volatile memory system if a repetitive pattern is indicated for the host-provided sector data and using it to avoid writing any data portion of the host-provided sector data to a physical sector of the non-volatile memory.

7. The non-volatile memory system, as recited in claim 6 , wherein the host interface control block includes a pattern detection circuit for comparing data portions of the sector data received from the host with each other to determine whether each data portion of the sector data contains the same pattern value.

8. The non-volatile memory system, as recited in claim 7 , wherein the pattern detection circuit is configured for detecting a flat pattern.

9. The non-volatile memory system, as recited in claim 6 , wherein the SRAM is configured for storing the pattern value.

10. The non-volatile memory system, as recited in claim 6 , wherein the host interface includes a pattern output circuit, programmed by the microprocessor, to generate a particular pattern, to the host, when a sector read command is received from the host to reconstruct the sector data using the stored pattern value.

11. The non-volatile memory system, as recited in claim 6 , wherein the sector address table includes entries, an entry including a virtual address of a sector of data, a virtual address having a virtual block number and a sector offset, the virtual block number identifying a block within the non-volatile memory, a block having more than one sector of data, the sector offset identifying a sector within the block identified by the virtual block number.

12. The non-volatile memory system, as recited in claim 6 , wherein a sector of data includes overhead.

13. A method of writing in a non-volatile memory system comprising:

receiving a sector write command from a host;

receiving sector data to be stored in non-volatile memory, the non-volatile memory organized into physical sectors for storage of sector data;

detecting a repetitive pattern in the host-provided sector data; and

avoiding writing any data portion of the host-provided sector data to a physical sector of the non-volatile memory by writing a portion of the sector data to a sector address table of the non-volatile memory system and indicating the presence of a repetitive pattern to permit reconstruction of the sector data from the portion of the sector data.

Assignments (10)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
MERGER Recorded Jun 11, 2013
From: LEXAR MEDIA, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 030591/0277 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 2, 2004
From: GOROBETS, SERGEY ANATOLIEVICH
To: LEXAR MEDIA, INC.
Reel/Frame 016036/0954 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2002
From: GOROBETS, SERGEY ANATOLIEVICH
To: LEXAR MEDIA, INC.
Reel/Frame 013348/0278 →