IP Library Granted Patent US 7,340,581
Granted Patent B2
US 7,340,581 · App. 10/260,259 · Granted Mar 4, 2008

Method of writing data to non-volatile memory

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Quick Facts
Patent No.
US 7,340,581
App. No.
10/260,259
Granted
Mar 4, 2008
Kind
B2
Abstract

According to a first aspect of the invention, there is provided a controller connected to a non-volatile memory and including a volatile memory, wherein the controller maintains lists in volatile memory of blocks in the non-volatile memory allocated for storage of logical sector data and of blocks recently erased in the non-volatile memory.

Claims (27)

1. A non-volatile memory system comprising:

volatile memory;

non-volatile memory including control data structures; and

a controller coupled to said non-volatile memory, said controller comprising means for maintaining lists in the volatile memory of blocks in the non-volatile memory allocated for storage of logical sector data, associated with logical addresses, and of blocks recently erased in the non-volatile memory, a plurality of cyclic write pointers for tracking the sequence of sector writing using the logical addresses, said controller further comprising transferring means for transferring information from the lists in the volatile memory to control data structures in the non-volatile memory less frequently than the rate at which the contents of the lists in volatile memory are changed, and means for including with every sector when written in the non-volatile memory a header containing logical address information representative of its logical address and further comprising means for reconstructing the lists in the volatile memory from existing information within the non-volatile memory wherein said existing information includes the logical address information in the headers of recently written sectors, the cyclic write pointers used to track the sequence of sector writing using logical addresses in the header of sectors in sequential physical position,

the memory system including means for maintaining a Sector Address Table (SAT) of a list of physical sectors addressing the sectors in non-volatile memory corresponding to all sectors in the memory system, the SAT being maintained in a plurality of SAT blocks and having n number of entries, the nth entry including the physical address for the sector having logical address n, each SAT block having two equal partitions, a SAT partition dedicated to SAT entries and a temporary SAT (TSAT) partition, the TSAT partition of the block being an area in which TSAT sectors, which are written during a control write operation, are temporarily stored before being written in the SAT partition, an index of valid TSAT sectors and their position in the TSAT partition being maintained in a TSAT Index (TSATI) field in the most recently written TSAT sector,

wherein when a TSAT sector is written, it is located at the first available sector position in the TSAT partition of the SAT block to which the sector relates, a SAT block is rewritten when its TSAT partition is full with valid TSAT sectors in the previous TSAT partition replacing the corresponding SAT sectors in the SAT partition, and the TSAT partition being left empty.

2. A non-volatile memory system as recited in claim 1 wherein the transferring means is operable to transfer the information from the lists in the volatile memory to the control data structures in the non-volatile memory concurrently with logical to physical mapping information for sectors from other lists in the volatile memory.

3. A non-volatile memory system, as recited in claim 1 , wherein the cyclic write pointers comprises a data write pointer for defining the physical location for writing a file including a plurality of sectors.

4. A non-volatile memory system, as recited in claim 1 , wherein the cyclic write pointers comprises a system write pointer for defining the physical location for writing system sectors transmitted by a host system.

5. A non-volatile memory system, as recited in claim 1 , wherein the cyclic write pointers comprises a data relocation pointer for defining the physical location for writing file data sectors which occasionally are to be relocated prior to a block erasure for recovery of capacity occupied by obsolete file data sectors.

6. A non-volatile memory system, as recited in claim 1 , wherein the cyclic write pointers comprises a system relocation pointer for defining define the physical location for writing system sectors which are being relocated prior to a block erasure for recovery of capacity occupied by obsolete system sectors.

7. A non-volatile memory system comprising:

non-volatile memory including blocks, each block having sectors addressed by logical addresses and stored and read from the non-volatile memory using physical addresses identifying sectors in physical locations or positions within the non-volatile memory, the blocks being in the erased states and blocks which have been recently erased; and

a controller coupled to a non-volatile memory and including a volatile memory, wherein the controller maintains a first list of all blocks in the non-volatile memory which are in the erased state and which are not included in other lists, the controller further maintains a second list of blocks in the non-volatile memory which have been recently erased, the lists allocated for storage of logical sector data, associated with logical addresses, and of blocks recently erased in the non-volatile memory, a plurality of cyclic write pointers for tracking the sequence of sector writing using the logical addresses, the cyclic write pointers used to track the sequence of sector writing using logical addresses in the header of sectors in sequential physical position,

wherein even use of blocks in the non-volatile memory for storage of data over a long period of operation is achieved and “hotspots” in non-volatile memory usage is avoided thereby increasing reliability of the memory system,

the memory system including means for maintaining a Sector Address Table (SAT) of a list of physical sectors addressing the sectors in non-volatile memory corresponding to all sectors in the memory system, the SAT being maintained in a plurality of SAT blocks and having n number of entries, the nth entry including the physical address for the sector having logical address n, each SAT block having two equal partitions, a SAT partition dedicated to SAT entries and a temporary SAT (TSAT) partition, the TSAT partition of the block being an area in which TSAT sectors, which are written during a control write operation, are temporarily stored before being written in the SAT partition, an index of valid TSAT sectors and their position in the TSAT partition being maintained in a TSAT Index (TSATI) field in the most recently written TSAT sector,

wherein when a TSAT sector is written, it is located at the first available sector position in the TSAT partition of the SAT block to which the sector relates, a SAT block is rewritten when its TSAT partition is full with valid TSAT sectors in the previous TSAT partition replacing the corresponding SAT sectors in the SAT partition, and the TSAT partition being left empty.

8. A non-volatile memory system as recited in claim 7 wherein the non-volatile memory includes control data structures and information from the lists in the volatile memory is transferred to the control data structures concurrently with logical to physical mapping information for sectors from other lists in volatile memory.

9. A method of operating a non-volatile memory system including a volatile memory and a non-volatile memory including control data structures, the method comprising:

maintaining lists in the volatile memory of blocks in the non-volatile memory allocated for storage of logical sector data and of blocks recently erased in the non-volatile memory;

transferring information from the lists in the volatile memory to control data structures in the non-volatile memory less frequently than the rate at which the contents of the lists in volatile memory are changed;

including with every sector when written in the non-volatile memory, a header containing logical address information representative of its logical address; and

reconstructing the lists in the volatile memory during initialization of the system from existing information within the non-volatile memory, wherein said existing information including the logical address information in the headers of recently written sectors;

maintaining a Sector Address Table (SAT) of a list of physical sectors addressing the sectors in non-volatile memory corresponding to all sectors in the memory system, the SAT being maintained in a plurality of SAT blocks and having n number of entries, the nth entry including the physical address for the sector having logical address n, each SAT block having two equal partitions, a SAT partition dedicated to SAT entries and a temporary SAT (TSAT) partition, the TSAT partition of the block being an area in which TSAT sectors, which are written during a control write operation, are temporarily stored before being written in the SAT partition, an index of valid TSAT sectors and their position in the TSAT partition being maintained in a TSAT Index (TSATI) field in the most recently written TSAT sector;

writing a TSAT sector in a location that is at the first available sector position in the TSAT partition of the SAT block to which the sector relates; and

rewriting a SAT block when its TSAT partition is full with valid TSAT sectors in the previous TSAT partition replacing the corresponding SAT sectors in the SAT partition, and the TSAT partition being left empty.

10. A method as recited in claim 9 , wherein said transferring from the lists to control data structures in the non-volatile memory occurs concurrently with logical to physical mapping information for sectors from other lists in the volatile memory.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
MERGER Recorded Mar 25, 2011
From: LEXAR MEDIA, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 026024/0131 →