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App. No. 10/264,618 · Confirmation No. 6352

SINGLE-CHIP MICROCOMPUTER WITH HIERARCHICAL INTERNAL BUS STRUCTURE HAVING DATA AND ADDRESS SIGNAL LINES COUPLING CPU WITH OTHER PROCESSING ELEMENTS

Patent Expired Due to NonPayment of Maintenance Fees Under 37 CFR 1.362 View Patent ↗ View Publication ↗
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 Code Description Pages PDF
2004-03-15 IFEE Issue Fee Payment (PTO-85B) 1 View
2002-10-04 TRNA Transmittal of New Application 3 View
2002-10-04 A.PE Preliminary Amendment 5 View
2002-10-04 SPEC Specification 154 View
2002-10-04 CLM Claims 7 View
2002-10-04 ABST Abstract 1 View
2002-10-04 DRW Drawings-only black and white line drawings 42 View
2002-10-04 LET. Miscellaneous Incoming Letter 1 View
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Quick Facts
App. No.
10/264,618
Filed
2002-10-04
Granted
2004-05-11
Pub. No.
US20030233527A1
Art Unit
2154
PTA
-79 days