IP Library Granted Patent US 6,892,449
Granted Patent B1
US 6,892,449 · App. 10/268,205 · Granted May 17, 2005

Method of manufacturing electro-optical devices

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Quick Facts
Patent No.
US 6,892,449
App. No.
10/268,205
Granted
May 17, 2005
Kind
B1
Abstract

A method of manufacturing a plurality of electro-optical sub-assemblies in parallel is provided. A plurality of printed circuit boards (PCBs) are preferably formed in a panel of flex material. Rigid substrates can be arranged along regions of the PCBs. A plurality of electrical components, including electro-optical semiconductor devices, are preferably located on the rigid substrates. Lens arrays are preferably aligned over the electro-optical semiconductor devices, such as through an alignment mechanism. The PCBs can then be singulated into individual electro-optical sub-assemblies. The rigid substrates can be a plurality of leadframes formed on a matrix leadframe. The matrix leadframe is preferably attached to the panel of flex material such that the leadframes are arranged in proximity to leadframe cutout regions of the PCBs. Electrical interconnections are then preferably formed between the electrical components on the leadframe and the PCBs.

Claims (44)

1. A method of manufacturing a plurality of electro-optical sub-assemblies in parallel, said method comprising:

forming a plurality of printed circuit boards (PCBs) on a panel of flex material;

forming one or more leadframe cutout regions in each of the PCBs;

forming a plurality of leadframes on a matrix leadframe;

attaching the matrix leadframe to the panel of flex material such that the plurality of leadfranes are arranged in proximity to the one or more leadframe cutout regions;

arranging a plurality of electrical components comprising electro-optical semiconductor devices on the plurality of leadframes;

forming electrical interconnections between the plurality of electrical components on the plurality of leadframes and corresponding ones of the plurality of PCBs;

aligning lens arrays over the electro-optical semiconductor devices; and

singulating the PCBs.

2. The method according to claim 1 , further comprising attaching array connectors to the plurality of PCBs to provide electrical interconnections with external devices.

3. The method according to claim 1 further comprising aligning the electro-optical semiconductor devices on the plurality of leadframes.

4. The method of claim 3 , wherein aligning lens arrays over the electro-optical semiconductor devices comprises using an alignment mechanism to align the lens arrays with the plurality of leadframes containing the electro-optical semiconductor devices.

5. The method of claim 4 , wherein the alignment mechanism comprises a plurality of matching alignment holes formed in the plurality of leadframes and in the lens arrays.

6. The method according to claim 1 , wherein aligning lens arrays over the electro-optical semiconductor devices comprises molding lens arrays over the plurality of leadframes in alignment with the electro-optical semiconductor devices.

7. The method according to claim 1 , further comprising forming release slots in the flex material, and wherein singulating the PCBs comprises punching out the PCBs or laser cutting tabs defined by the release slots formed in the flex material.

8. A method of manufacturing a plurality of electro-optical sub-assemblies in parallel, said method comprising:

forming a plurality of printed circuit boards (PCBs) on a panel of flex material;

arranging a rigid substrate along a region of each of the PCBs;

arranging a plurality of electrical components comprising electro-optical semiconductor devices on the rigid substrates;

aligning the electro-optical semiconductor devices on the rigid substrate;

aligning lens arrays over the electro-optical semiconductor devices using an alignment mechanism to align the lens arrays with the rigid substrate containing the electro-optical semiconductor devices, wherein the alignment mechanism comprises a plurality of matching alignment holes formed in the rigid substrate and in the lens arrays; and

singulating the PCBs.

9. The method according to claim 8 , wherein the rigid substrate comprises a leadframe and wherein arranging a rigid substrate along a region of each of the PCBs comprises:

forming one or more leadframe regions in each of the PCBs;

forming a plurality of leadframes on a matrix leadframe;

attaching the matrix leadframe to the panel of flex material such that the leadframes are arranged in proximity to the leadframe cutout regions; and

forming electrical interconnections between the electrical components on the leadframe and the PCBs.

10. The method according to claim 8 , wherein said rigid substrate comprises a rigid region of the PCB.

11. The method according to claim 8 , further comprising attaching array connectors to the plurality of PCBs to provide electrical interconnections with external devices.

12. The method according to claim 8 , further comprising, forming release slots in the flex material, and wherein singulating the PCBs comprises punching out the PCBs or laser cutting tabs defined by the release slots formed in the flex material.

13. A method of manufacturing a plurality of electro-optical sub-assemblies in parallel, said method comprising:

forming a plurality of printed circuit boards (PCBs) on a panel of flex material;

arranging a rigid substrate along a region of each of the PCBs;

arranging a plurality of electrical components comprising electro-optical semiconductor devices on the rigid substrates;

aligning lens arrays over the electro-optical semiconductor devices using an alignment mechanism to align the lens arrays with the rigid substrate containing the electro-optical semiconductor devices, wherein the alignment mechanism comprises a plurality of matching alignment holes formed in the rigid substrate and in the lens arrays; and

singulating the PCBs.

14. The method according to claim 13 , wherein the rigid substrate comprises a leadframe and wherein arranging a rigid substrate along a region of each of the PCBs comprises:

forming one or more leadframe regions in each of the PCBs;

forming a plurality of leadframes on a matrix leadframe;

attaching the matrix leadframe to the panel of flex material such that the leadframes are arranged in proximity to the leadframe cutout regions; and

forming electrical interconnections between the electrical components on the leadframe and the PCBs.

15. The method according to claim 13 , wherein said rigid substrate comprises a rigid region of the PCB.

16. The method according to claim 13 , further comprising aligning the electro-optical semiconductor devices on the rigid substrate.

17. The method according to claim 13 , further comprising forming release slots in the flex material, and wherein singulating the PCBs comprises punching out the PCBs or laser cutting tabs defined by the release slots formed in the flex material.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Oct 26, 2020
From: JEFFERIES FINANCE LLC
To: RPX CORPORATION
Reel/Frame 054486/0422 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 7, 2020
From: RPX CORPORATION
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 051842/0494 →
RELEASE OF LIEN ON PATENTS Recorded Oct 21, 2019
From: JEFFERIES FINANCE LLC, AS COLLATERAL AGENT
To: RPX CORPORATION
Reel/Frame 050777/0983 →
SECURITY INTEREST Recorded Jun 29, 2018
From: RPX CORPORATION
To: JEFFERIES FINANCE LLC
Reel/Frame 046486/0433 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 9, 2014
From: CYPRESS SEMICONDUCTOR CORPORATION
To: RPX CORPORATION
Reel/Frame 031950/0752 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 9, 2002
From: BROPHY, BRENOR; HARTRANFT, MARC; SHAFAAT, SYED TARIQ; HALL, JEFF
To: CYPRESS SEMICONDUCTOR CORP.
Reel/Frame 013379/0897 →