Low voltage differential signal driver circuit and method
View Patent ↗Embodiments of the present invention relate to a low voltage differential signal driver (LVDS) circuit which comprises a current source, logic controlled switches for controlling the driver's output, an electronic load circuit coupled across the circuit, and a common-mode resistor feedback circuit coupled across the circuit, in parallel with the RC load, for tuning the driver's impedance. The driver is enabled to operate without op-amps and achieves optimum performance at 1.8 v supply voltages.
1. A system for driving a low voltage differential signal comprising:
a current source;
a driver circuit coupled to said current source and controlled by logical switches, wherein said driver circuit comprises a common-mode resistor feedback circuit for reducing an output impedance of said driver circuit during transitions in said low voltage differential signal;
a current mirror coupled to said driver circuit and controlled by a feedback voltage of said common mode resistor feedback circuit; and
a bias voltage source coupled to said current mirror and enabled to control said current mirror.
2. The system for driving a low voltage differential signal described in claim 1 , wherein said driver circuit further comprises a capacitive load.
3. The system for driving a low voltage differential signal described in claim 1 , wherein said driver circuit further comprises a resistive load.
4. The system for driving a low voltage differential signal described in claim 1 , wherein said current source is controlled by said feedback voltage of said common-mode resistor feedback circuit.
5. The system for driving a low voltage differential signal described in claim 1 , wherein said common-mode resistor feedback circuit enables tuning said output impedance of said driver circuit.
6. The system for driving a low voltage differential signal described in claim 1 , wherein said driver circuit is enabled to operate in a single pole mode.
7. The system for driving a low voltage differential signal described in claim 1 , wherein said driver circuit further comprises:
a resistive load; and
a parasitic capacitance of said system.
8. A low voltage differential signal driver circuit, comprising:
an electronic load circuit coupled to said current source, wherein an output signal is generated as a function of a direction of a current flowing through said electronic load circuit;
logic controlled switches coupled to said current source, for selectively controlling said direction of said current flowing through said electronic load circuit;
a common-mode resistor feedback circuit coupled to said electronic load circuit for generating a common mode voltage and for reducing an output impedance during transitions of said output signal; and
a current mirror coupled to said electronic load circuit for controlling said current as a function of said common mode voltage.
9. The low voltage differential signal driver circuit according to claim 8 , further comprising a current source coupled to said electronic load circuit for supplying said current.
10. The low voltage differential signal driver circuit according to claim 8 , further comprising a bias voltage source coupled to said current mirror for further controlling said current.
11. The low voltage differential signal driver circuit according to claim 8 , wherein said low voltage differential signal driver circuit is enabled to operate in a single pole mode.
12. The low voltage differential signal driver circuit described in claim 8 , wherein said common-mode resistor feedback circuit is coupled in parallel with said electronic load circuit.
13. The low voltage differential signal driver circuit described in claim 12 , wherein said electronic load circuit comprises a resistive load.
14. The low voltage differential signal driver circuit described in claim 12 , wherein said electronic load circuit comprises a capacitive load.
15. A method for driving a low voltage differential signal, comprising:
selectively controlling a direction of a current through an output impedance as a function of an input signal;
generating a differential output signal as a function of said direction of said current through said output impedance;
generating a common mode feedback signal as a function of said differential output signal;
controlling said current as a function of said common mode feedback signal and as a function of a bias voltage; and
modifying said output impedance during transitions of said differential output signal.
16. The method according to claim 15 , wherein said modifying said output impedance is accomplished by varying a resistance of said output impedance.
17. The method according to claim 15 , wherein said modifying said output impedance is accomplished by varying a capacitance of said output impedance.