A test socket 10 of the present invention includes a base member 20 , a cover member 30 which is installed on base 20 to move in reciprocal straight line movement between a first position away from the base and a second position adjacent the base and a plurality of contact members 40 that are fixed in the base and are capable of making contact with terminals 2 on a semiconductor device 1 when such device 1 is mounted on base 20 . A latch member 60 is supported on base 20 in a rotatable manner to move in linkage with the movement of cover member 30 . A compression member 80 is pivotably attached to a tip portion 62 of latch member 60 for pressing semiconductor part 1 onto base 20 to achieve reliable contacting between terminals 2 and contacts 40 in response to movement of cover member 30 . This socket design will provide for wide area engagement between the surface of semiconductor part 1 and compression member 80 to prevent damage to the semiconductor part 1 during testing.
1. A socket for use with a semiconductor device having a top surface and a bottom surface with a plurality of terminals on a bottom surface comprising a base, an adaptor member received on the base having a seating surface for said semiconductor device, the adaptor member having a plurality of contact member receiving holes extending through the seating surface, a cover which is arranged on the base and supported for straight line movement between a first position in which the cover is apart from the base and a second position in which the cover is adjacent to the base, a plurality of contact members having tips received in each of the contact member receiving holes to be placed in contact with each terminal of the semiconductor device placed on the seating surface, and a rotary latch member having a rotational axis fixed to the base being movable in conjunction with the movement of said cover member, said latch member having a tip portion onto which a compressive part member is mounted so as to be able to pivot with regard to said tip portion, said compressive part member being positions to be capable of pressing said semiconductor device against said seating surface when said semiconductor device is on said seating surface and said cover member is in said first position for providing reliable electric contact between said plurality of terminals and said plurality of contact members while not damaging said semiconductor device due to said compressive part member marking wide area contact with said top surface of said semiconductor device.
2. A socket according to claim 1 wherein said compressive part member contains a shaft that is installed at said tip portion of said latch member and a contacting member joined to said shaft so as to be fully rotatable thereon, said contacting member having a pressing surface for engagement with the top surface of said semiconductor device.
3. A socket according to claim 2 wherein said contacting member has a hole that accommodates said shaft with said hole being larger than the diameter of said shaft.
4. A socket according to claim 3 wherein said hole is an elongated hole.
5. A socket according to claim 1 wherein said compressive part member is biased in one direction by a spring member.
6. A socket according to claim 1 wherein said compressive part member includes a spherical member that is formed at the tip of said latch member and a contacting member that is joined to said spherical member so as to be fully rotatable thereon, said contacting member having a pressing surface for engagement with the top surface of said semiconductor device.
7. A socket according to claim 1 wherein said latch member rotates in linkage with the movement of said cover member.
8. A socket according to claim 1 wherein said adaptor member is biased toward said cover member by a spring.
9. A socket according to claim 8 wherein said adaptor member is displaced at the time said semiconductor device is pressed by said compressive part member.
10. A socket according to claim 1 wherein said semiconductor device has a plurality of two dimensionally arranged terminals on the bottom surface of the semiconductor device.