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App. No. 10/305,054 · Confirmation No. 6885

METHOD FOR AUTOMATICALLY LAYING OUT SEMICONDUCTOR INTEGRATED CIRCUIT

Inventor: Mayumi Hayakawa
Patent Expired Due to NonPayment of Maintenance Fees Under 37 CFR 1.362 View Patent ↗ View Publication ↗
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2004-05-04 IFEE Issue Fee Payment (PTO-85B) 1 View
2004-02-18 NOA Notice of Allowance and Fees Due (PTOL-85) 5 View
2004-02-18 892 List of references cited by examiner 1 View
2004-02-18 FOR Foreign Reference 13 View
2004-02-18 1449 List of References cited by applicant and considered by examiner 1 View
2004-02-18 IIFW Issue Information including classification, examiner, name, claim, renumbering, etc. 1 View
2004-02-18 SRFW Search information including classification, databases and other search related notes 1 View
2004-02-18 FWCLM Index of Claims 1 View
2004-02-04 SRNT Examiner's search strategy and results 5 View
2002-11-27 TRNA Transmittal of New Application 4 View
2002-11-27 SPEC Specification 12 View
2002-11-27 CLM Claims 4 View
2002-11-27 ABST Abstract 1 View
2002-11-27 DRW Drawings-only black and white line drawings 7 View
2002-11-27 OATH Oath or Declaration filed 2 View
2002-11-27 WFEE Fee Worksheet (SB06) 1 View
2002-11-27 WFEE Fee Worksheet (SB06) 1 View
2002-11-27 FRPR Certified Copy of Foreign Priority Application 23 View
2002-11-27 IDS Information Disclosure Statement (IDS) Form (SB08) 2 View
2002-11-27 FOR Foreign Reference 9 View
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Quick Facts
App. No.
10/305,054
Filed
2002-11-27
Granted
2004-06-22
Pub. No.
US20030101424A1
Examiner
LIN, SUN J
Art Unit
2825
PTA
0 days