IP Library › Granted Patent US 7,653,808
Granted Patent B2
US 7,653,808 · App. 10/306,065 · Granted Jan 26, 2010

Providing selectable processor abstraction layer components within one BIOS program

Assignee: Intel Corporation
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Quick Facts
Patent No.
US 7,653,808
App. No.
10/306,065
Granted
Jan 26, 2010
Kind
B2
Abstract

A system abstraction layer enables selection from among at least two different processor abstraction layer components. By allowing the selection from a plurality of compressed components, better system adaptability may be achieved. For example, updates may be provided so that it is not necessary to update the entire basic input/output system each time a component of the processor abstraction layer needs to be updated. In addition, a variety of different platforms may be supported by one basic input/output system having a plurality of selectable processor abstraction layer component images.

Claims (11)

1. A system comprising:

a processor;

a storage coupled to said processor, said storage storing instructions that enable the selection of one of at least two selectable processor abstraction layer B components within one basic input/output system program.

2. The system of claim 1 wherein said storage also stores a basic input/output system.

3. The system of claim 1 wherein said storage is a hard disk drive.

4. The system of claim 1 wherein said storage stores a catalog of selectable processor abstraction layer components.

5. The system of claim 1 wherein said selectable processor abstraction layer components are part of a file system partition.

6. The system of claim 5 wherein said file system partition is an accessible firmware interface partition.

7. The system of claim 1 wherein said storage stores instructions that enable an authentication service to be invoked to authenticate a selected one of said processor abstraction layer components.

8. The system of claim 1 wherein said storage stores instructions to shadow a selected one of said at least two processor abstraction layer components.

9. The system of claim 1 wherein said storage stores instructions to shadow a firmware interface table stored in said storage.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2003
From: GOUD, GUNDRALA D.
To: INTEL CORPORATION
Reel/Frame 013786/0161 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 27, 2002
From: ZIMMER, VINCENT J.
To: INTEL CORPORATION
Reel/Frame 013541/0808 →
Continuity (1)
Related Publication 20040103273A1 · May 27, 2004