IP Library Granted Patent US 6,977,217
Granted Patent B1
US 6,977,217 · App. 10/308,410 · Granted Dec 20, 2005

Aluminum-filled via structure with barrier layer

Assignee: Cypress Semiconductor Corporation
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Quick Facts
Patent No.
US 6,977,217
App. No.
10/308,410
Granted
Dec 20, 2005
Kind
B1
Abstract

In one embodiment, a via structure includes a liner, a barrier layer over the liner, and an aluminum layer over the barrier layer. The barrier layer helps minimize reaction between the aluminum layer and the liner, thus helping minimize void formation in the via. The liner and the barrier layer may be deposited in-situ by ionized metal plasma (IMP) physical vapor deposition (PVD). In one embodiment, the liner comprises titanium, while the barrier layer comprises titanium nitride.

Claims (18)

1. A method of filling a via structure, the method comprising:

depositing a liner in a via;

depositing a barrier layer in the via, the barrier layer comprising a material that does not substantially react with aluminum, wherein the liner and the barrier layer are deposited by ionized metal plasma (IMP) physical vapor deposition (PVD);

depositing aluminum over the barrier layer in the via using a hot aluminum process, the hot aluminum process comprising a first PVD step at about room temperature followed by a second PVD step at a temperature higher than room temperature, the aluminum in the via being electrically coupled to an underlying metal stack comprising a titanium layer, an aluminum layer over the titanium layer, and a titanium tungsten layer over the aluminum layer;

wherein the liner, the barrier layer, and the aluminum in the via are deposited in-situ in a same device fabrication system.

2. The method of claim 1 wherein the barrier layer comprises titanium nitride.

3. The method of claim 1 wherein the liner comprises titanium.

4. The method of claim 1 wherein the barrier layer and the liner are each deposited to a thickness of about 150 Angstroms or less.

5. The method of claim 1 wherein the via is formed in a layer of dielectric comprising silicon dioxide.

6. A method of forming a via, the method comprising:

using an etch process to form a via, the etch process going through a dielectric layer and stopping before going all the way through a first layer that is directly on an aluminum layer, the aluminum layer being over a titanium layer, the first layer the aluminum layer, and the titanium layer forming a metal stack;

depositing a liner over the first layer in the via;

depositing a barrier layer over the liner, the barrier layer comprising a material that does not substantially react with aluminum; and

depositing a metal comprising aluminum over the barrier layer in the via using a hot aluminum process, the hot aluminum process comprising a first physical vapor deposition step at about room temperature followed by a second physical vapor deposition step at a temperature higher than room temperature;

wherein the liner, the barrier layer, and the aluminum in the via are deposited in-situ in a same device fabrication system.

7. The method of claim 6 wherein the etch process gouges into the first layer.

8. The method of claim 6 wherein the etch process stops on the first layer.

9. The method of claim 6 wherein the dielectric layer comprises silicon dioxide.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2018
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 045393/0065 →
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2018
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 045782/0028 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2002
From: BEN-TZUR, MIRA; LAU, GORLEY L.; IVANOV, IVAN P.; DAI, FENG; YANG, CHAN-LON
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 013544/0676 →