Packaging of a microchip device
View Patent ↗A method of packaging a microchip device, an interposer for packaging, and a packaged microchip device. An interposer is placed on microchip devices. The interposer includes an aperture which extends from the interposer surface where external electrical contacts are located on the surface of the microchip devices. Electrical contacts on the microchip device surface are accessible through the aperture in order to electrically connect the electrical contacts with the external electrical contacts of the interposer. The aperture is divided into at least two openings or aperture regions, separated by a bridge. This facilitates the handling of the interposer.
1. A microchip package comprises:
a microchip device with a top surface and a bottom surface;
a plurality of first electrical contacts on said top surface of said microchip device;
an interposer with a top surface and a bottom surface, wherein said bottom surface of said interposer affixes to said top surface of said microchip device;
a plurality of second electrical contacts on said top surface of said interposer;
an aperture having a sidewall defining an opening through said interposer wherein said aperture allows a connection of said plurality of first electrical contacts on said top surface of said microchip device to said plurality of second electrical contacts on said top surface of said interposer; and
a tie-bar dividing said aperture into a first portion and a second portion wherein said tie-bar is affixed to said sidewall, wherein a depth of said tie-bar in said aperture is substantially two thirds of said depth of said aperture through said interposer.
2. The microchip package according to claim 1 , further comprising:
a material encapsulating said connection of said plurality of first electrical contacts on said top surface of said microchip to said plurality of second electrical contacts on said top surface of said interposer in said aperture.
3. The microchip package according to claim 2 , wherein said material is an electrically insulating material.
4. The microchip package according to claim 1 , wherein said connection of said plurality of first electrical contacts on said top surface of said microchip device to said plurality of second electrical contacts on the top surface of said interposer comprises:
a conductive material.