Method and system for reducing contact defects using non conventional contact formation method for semiconductor cells
View Patent ↗A method and system for providing at least one contact in a semiconductor device. The semiconductor device includes a substrate, an etch stop layer, an interlayer dielectric on the etch stop layer, an anti-reflective coating layer on the interlayer dielectric, and at least one feature below the etch stop layer. A resist mask having an aperture and residing on the anti-reflective coating layer is provided. The aperture is above an exposed portion of the anti-reflective coating layer. The method and system include etching the exposed anti-reflective coating layer and the underlying interlayer dielectric without etching through the etch stop layer, thereby providing a portion of at least one contact hole. The method and system also include removing the resist mask in situ, removing a portion of the etch stop layer exposed in the portion of the contact hole, and filling the contact hole with a conductive material.
1. A method for providing at least one contact in a semiconductor including a substrate, an etch stop layer, an interlayer dielectric in contact with the etch stop layer, an anti-reflective coating layer in contact with the interlayer dielectric, and at least one feature below the etch stop layer, a resist mask having at least one aperture therein residing on the anti-reflective coating layer, the least one aperture being above an exposed portion of the anti-reflective coating layer, the method comprising the steps of:
(a) etching the exposed portion of the anti-reflective coating layer and the interlayer dielectric below the exposed portion of the anti-reflective coating layer without etching through the etch stop layer to provide a portion of at least one contact hole;
(b) removing the resist mask in situ;
(c) removing a portion of the etch stop layer exposed in the portion of the at least one contact hole to provide the at least one contact hole in situ; and
(d) filling the at least one contact hole with a conductive material.
2. The method of claim 1 wherein the resist mask removing step (b) further includes the step of:
(b1) cleaning the portion of the contact hole in situ.
3. The method of claim 1 wherein the etch stop layer includes SiN and/or SiON.
4. The method of claim 1 wherein the anti-reflective coating layer includes SiN and/or SiON or SIRN (Si rich nitride).
5. The method of claim 1 further comprising the step of:
(e) planarizing the conductive material without scratching a surface of the interlayer dielectric.
6. The method of claim 1 further comprising the step of:
(e) removing a portion of the anti-reflective coating layer in situ before the at least one contact hole is filled.