Patent Assignment
Reel/Frame 024522/0338
SECURITY AGREEMENT
Recorded: 2010-06-04
Received: 2010-06-04
Pages: 225
Assignors
SPANSION INC.
Executed: 2010-05-10
SPANSION LLC
Executed: 2010-05-10
SPANSION TECHNOLOGY INC.
Executed: 2010-05-10
SPANSION TECHNOLOGY LLC
Executed: 2010-05-10
Assignee
BARCLAYS BANK PLC
745 SEVENTH AVENUE, NEW YORK, NY, 10019, UNITED STATES
Covered Applications
(100)
NON-VOLATILE SONOS-TYPE MEMORY DEVICE
App. No. 12/574,884
→
SEMICONDUCTOR DEVICE, FABRICATION METHOD THEREOF, AND PHOTOMASK
App. No. 12/575,122
→
METHOD AND APPARATUS FOR ADAPTIVE MEMORY CELL OVERERASE COMPENSATION
App. No. 12/574,079
→
SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
App. No. 12/574,427
→
SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
App. No. 12/574,413
→
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
App. No. 12/556,408
→
READING ELECTRONIC MEMORY UTILIZING RELATIONSHIPS BETWEEN CELL STATE DISTRIBUTIONS
App. No. 12/550,642
→
SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREFOR
App. No. 12/543,404
→
INTEGRATED CIRCUIT WITH CONTACT REGION AND MULTIPLE ETCH STOP INSULATION LAYER
App. No. 12/539,480
→
SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
App. No. 12/512,638
→
MEMORY DEVICE PERIPHERAL INTERCONNECTS AND METHOD OF MANUFACTURING
App. No. 12/512,960
→
SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
App. No. 12/508,319
→
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
App. No. 12/502,891
→
AUTOMATED LOADING/UNLOADING OF DEVICES FOR BURN-IN TESTING
App. No. 12/492,968
→
AUTOMATED LOADING/UNLOADING OF DEVICES FOR BURN-IN TESTING
App. No. 12/492,922
→
SEMICONDUCTOR DEVICE AND CONTROL METHOD OF THE SAME
App. No. 12/491,970
→
SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD
App. No. 12/491,092
→
IMAGING DEVICE HAVING A RADIATION DETECTING STRUCTURE DISPOSED AT A SEMICONDUCTOR SUBSTRATE WITH A THERMALIZING MATERIAL AND A FIRST RADIATION-REACTIVE MATERIAL SENSITIVE TO NEUTRON RADIATION (AS AMENDED)
App. No. 12/472,735
→
SWITCHABLE MEMORY DIODE - A NEW MEMORY DEVICE
App. No. 12/470,825
→
SEMICONDUCTOR DEVICE AND METHOD FOR BOOSTING WORD LINE
App. No. 12/406,845
→
METHOD AND ARCHITECTURE FOR FAST FLASH MEMORY PROGRAMMING
App. No. 12/405,947
→
SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD
App. No. 12/404,146
→
HIGH K STACK FOR NON-VOLATILE MEMORY
App. No. 12/351,553
→
SONOS-NAND DEVICE HAVING A STORAGE REGION SEPARATED BETWEEN CELLS
App. No. 12/343,998
→
FLIP CHIP BONDED SEMICONDUCTOR DEVICE WITH SHELF AND METHOD OF MANUFACTURING THEREOF
App. No. 12/343,348
→
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF
App. No. 12/341,874
→
TIME REDUCTION OF ADDRESS SETUP/HOLD TIME FOR SEMICONDUCTOR MEMORY
App. No. 12/341,886
→
SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING
App. No. 12/341,879
→
SEMICONDUCTOR DEVICE HAVING A SIMPLIFIED STACK AND METHOD FOR MANUFACTURING THEREOF
App. No. 12/341,863
→
FORMING METAL-SEMICONDUCTOR FILMS HAVING DIFFERENT THICKNESSES WITHIN DIFFERENT REGIONS OF AN ELECTRONIC DEVICE
App. No. 12/340,274
→
STACKED SEMICONDUCTOR DEVICES AND A METHOD FOR FABRICATING THE SAME
App. No. 12/337,396
→
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING
App. No. 12/337,461
→
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING
App. No. 12/336,757
→
ELECTRONIC CIRCUIT
App. No. 12/334,221
→
METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE
App. No. 12/332,146
→
DIE OFFSET DIE TO BONDING
App. No. 12/316,041
→
DIE OFFSET DIE TO DIE BONDING
App. No. 12/316,042
→
STACKED ORGANIC MEMORY DEVICES AND METHODS OF OPERATING AND FABRICATING
App. No. 12/327,040
→
METHOD FOR FORMING A FLASH MEMORY DEVICE WITH STRAIGHT WORD LINES
App. No. 12/327,641
→
CARRIER STRUCTURE FOR STACKED-TYPE SEMICONDUCTOR DEVICE, METHOD OF PRODUCING THE SAME, AND METHOD OF FABRICATING STACKED-TYPE SEMICONDUCTOR DEVICE
App. No. 12/315,417
→
SEMICONDUCTOR DEVICE AND METHOD OF CONTROLLING THE SAME
App. No. 12/275,121
→
TEST STUCTURES FOR DEVELOPMENT OF METAL-INSULATOR-METAL (MIM) DEVICES
App. No. 12/313,089
→
RESISTIVE MEMORY CELL ARRAY WITH COMMON PLATE
App. No. 12/290,179
→
SYSTEM AND METHOD FOR STACKING A PLURALITY OF ELECTRICALLY COUPLED SEMICONDUCTOR CHIPS WITH A CONDUCTIVE PIN
App. No. 12/259,100
→
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
App. No. 12/258,067
→
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF
App. No. 12/256,333
→
SEMICONDUCTOR MEMORY DEVICE WITH STACKED MEMORY CELL STRUCTURE
App. No. 12/253,619
→
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE BY CONSIDERING THE EXTINCTION COEFFICIENT DURING ETCHING OF AN INTERLAYER INSULATING FILM
App. No. 12/253,035
→
SYSTEM AND METHOD OF OPERATION FOR RESISTIVE CHANGE MEMORY
App. No. 12/243,836
→
METHOD FOR DETECTING A VOID
App. No. 12/240,767
→
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
App. No. 12/239,566
→
SONOS DEVICE WITH INSULATING STORAGE LAYER AND P-N JUNCTION ISOLATION
App. No. 12/235,321
→
SEMICONDUCTOR DEVICE INCLUDING A PRESSURE-CONTACT SECTION
App. No. 12/234,337
→
SEMICONDUCTOR DEVICE AND METHOD USING STRESS INFORMATION
App. No. 12/233,577
→
SEMICONDUCTOR DEVICE AND ITS CONTROL METHOD
App. No. 12/283,721
→
SEMICONDUCTOR DEVICE AND ITS CONTROL METHOD
App. No. 12/283,722
→
MANUFACTURING STACKED SEMICONDUCTOR DEVICE
App. No. 12/210,113
→
METHOD AND APPARATUS FOR ADDRESS ALLOTTING AND VERIFICATION IN A SEMICONDUCTOR DEVICE
App. No. 12/199,684
→
MEMORY DEVICE AND METHODS FOR ITS FABRICATION
App. No. 12/199,692
→
STACKED SOLDER BALLS FOR INTEGRATED CIRCUIT DEVICE PACKAGING AND ASSEMBLY
App. No. 12/196,210
→
SEMICONDUCTOR DEVICE HAVING CHIP MOUNTED ON AN INTERPOSER
App. No. 12/196,156
→
PLASMA TREATED METAL SILICIDE LAYER FORMATION
App. No. 12/195,307
→
SEPERATION METHODS FOR SEMICONDUCTOR CHARGE ACCUMULATION LAYERS AND STRUCTURES THEREOF
App. No. 12/195,324
→
METHOD FOR MANUFACTURING SONOS FLASH MEMORY
App. No. 12/193,266
→
U-SHAPED SONOS MEMORY HAVING AN ELEVATED SOURCE AND DRAIN
App. No. 12/192,945
→
MIRROR BIT MEMORY DEVICE APPLYING A GATE VOLTAGE ALTERNATELY TO GATE
App. No. 12/192,923
→
APPARATUS AND METHOD FOR A MEMORY ARRAY WITH SHALLOW TRENCH ISOLATION REGIONS BETWEEN BIT LINES FOR INCREASED PROCESS MARGINS
App. No. 12/187,276
→
SELF-ALIGNED CHARGE STORAGE REGION FORMATION FOR SEMICONDUCTOR DEVICE
App. No. 12/183,756
→
THERMOELECTRIC DEVICE FOR USE WITH STIRLING ENGINE
App. No. 12/180,910
→
STACKED DIE PACKAGE HAVING REDUCED HEIGHT AND METHOD OF MAKING SAME
App. No. 12/180,185
→
LATERAL CHARGE STORAGE REGION FORMATION FOR SEMICONDUCTOR WORDLINE
App. No. 12/180,306
→
FLASH MEMORY DEVICE WITH WORD LINES OF UNIFORM WIDTH AND METHOD FOR MANUFACTURING THEREOF
App. No. 12/179,400
→
SYNCHRONOUS MEMORY DEVICES AND CONTROL METHODS FOR PERFORMING BURST WRITE OPERATIONS
App. No. 12/176,997
→
NONVOLATILE MEMORY DEVICE HAVING A PLURALITY OF MEMORY BLOCKS
App. No. 12/177,039
→
PROBE APPARATUS, A PROCESS OF FORMING A PROBE HEAD, AND A PROCESS OF FORMING AN ELECTRONIC DEVICE
App. No. 12/174,743
→
CARRIER FOR STACKED TYPE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING STACKED TYPE SEMICONDUCTOR DEVICES
App. No. 12/166,293
→
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF
App. No. 12/217,096
→
METHOD AND APPARATUS FOR MANUFACTURING SEMICONDUCTOR DEVICE
App. No. 12/166,290
→
SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING A SEMICONDUCTOR DEVICE
App. No. 12/166,288
→
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF
App. No. 12/165,331
→
ERROR CORRECTION SCHEME FOR NON-VOLATILE MEMORY
App. No. 12/139,650
→
SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING THEREOF
App. No. 12/139,274
→
COMMAND CONTROL FOR SYNCHRONOUS MEMORY DEVICE
App. No. 12/138,307
→
SHADOW WRITE AND TRANSFER SCHEMES FOR MEMORY DEVICES
App. No. 12/137,443
→
SENSE AMPLIFIER WITH CAPACITANCE-COUPLED DIFFERENTIAL SENSE AMPLIFIER
App. No. 12/134,905
→
NON-VOLATILE MEMORY STRING MODULE WITH BUFFER AND METHOD
App. No. 12/134,898
→
MEMORY DEVICE AND METHOD
App. No. 12/134,902
→
ULTRAVIOLET BLOCKING STRUCTURE AND METHOD FOR SEMICONDUCTOR DEVICE
App. No. 12/133,689
→
PRECISION TRENCH FORMATION THROUGH OXIDE REGION FORMATION FOR A SEMICONDUCTOR DEVICE
App. No. 12/134,087
→
SEMICONDUCTOR DEVICE AND CONTROLLING METHOD FOR THE SAME
App. No. 12/130,583
→
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME AND SEMICONDUCTOR MANUFACTURING DEVICE
App. No. 12/130,577
→
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
App. No. 12/130,537
→
INSTANT HARDWARE ERASE FOR CONTENT RESET AND PSEUDO-RANDOM NUMBER GENERATION
App. No. 12/129,737
→
ENHANCED ERASING OPERATION FOR NON-VOLATILE MEMORY
App. No. 12/129,530
→
ADDRESS CACHING STORED TRANSLATION
App. No. 12/127,919
→
MULTIPLE PROGRAMMING OF SPARE MEMORY REGION FOR NONVOLATILE MEMORY
App. No. 12/126,686
→
METHOD FOR BALL GRID ARRAY (BGA) SOLDER ATTACH FOR SURFACE MOUNT
App. No. 12/126,600
→
STRUCTURE, METHOD AND SYSTEM FOR ASSESSING BONDING OF ELECTRODES IN FCB PACKAGING
App. No. 12/122,556
→
MEMORY DEVICE INTERCONNECTS AND METHOD OF MANUFACTURING
App. No. 12/116,200
→
BITCELL CURRENT SENSE DEVICE AND METHOD THEREOF
App. No. 12/114,966
→