Semiconductor device and method for boosting word line
View Patent ↗A semiconductor device of the present invention includes a booster circuit that boosts a selected word line (WL) to a given voltage higher than a power supply voltage and a charge pump circuit that retains the boosted word line (WL) at the first given voltage. When the booster circuit boosts the word line, the voltage level is degraded as the time goes. However, it is possible to program the memory cell and read out thereof properly by retaining the voltage of the word line with the charge pump circuit.
1. A method of operating a memory device, said method comprising:
charging a word line to a power supply voltage level;
boosting said word line to a higher voltage level than said power supply voltage level; and
preventing discharge of said word line below said higher voltage level.
2. The method of claim 1 , further comprising:
reading a memory cell coupled to said word line.
3. The method of claim 1 , further comprising:
programming a memory cell coupled to said word line.
4. The method of claim 1 , wherein said boosting said word line comprises:
coupling said word line to a boosting capacitor; and
applying a one-shot positive pulse to said boosting capacitor.
5. The method of claim 1 , wherein said preventing discharge comprises:
coupling said word line to a cathode of a diode; and
coupling an anode of said diode to an output of a charge pump circuit.
6. The method of claim 5 , wherein said preventing discharge further comprises:
regulating said output of said charge pump circuit.
7. The method of claim 1 , further comprising:
detecting a change in an address signal; and
in response to detection of change, starting said boosting said word line and starting said preventing discharge.
8. A method of operating a memory device, said method comprising:
in response to change in an address signal, boosting a voltage level of a word line from a power supply voltage value to a higher voltage value; and
preventing discharge of said word line below said higher voltage value.
9. The method of claim 8 , further comprising:
reading a memory cell coupled to said word line.
10. The method of claim 8 , further comprising:
programming a memory cell coupled to said word line.
11. The method of claim 8 , wherein said boosting said voltage level comprises:
coupling said word line to a boosting capacitor; and
applying a one-shot positive pulse to said boosting capacitor.
12. The method of claim 8 , wherein said preventing discharge comprises:
coupling said word line to a cathode of a diode; and
coupling an anode of said diode to an output of a charge pump circuit.
13. The method of claim 12 , wherein said preventing discharge further comprises:
regulating said output of said charge pump circuit.
14. The method of claim 8 , further comprising:
precharging said voltage level of said word line to said power supply voltage value.
15. A method of operating a memory device, said method comprising:
initiating a memory operation;
in response to initiation of said memory operation, boosting a voltage level of a word line from a power supply voltage value to a higher voltage value; and
preventing discharge of said higher voltage value of said word line.
16. The method of claim 15 , wherein said memory operation comprises a read operation.
17. The method of claim 15 , wherein said memory operation comprises a program operation.
18. The method of claim 15 , wherein said boosting said voltage level comprises:
coupling said word line to a boosting capacitor; and
applying a one-shot positive pulse to said boosting capacitor.
19. The method of claim 15 , wherein said preventing discharge comprises:
coupling said word line to a cathode of a diode; and
coupling an anode of said diode to an output of a charge pump circuit.
20. The method of claim 19 , wherein said preventing discharge further comprises:
regulating said output of said charge pump circuit.