IP Library Assignment 036042/0212
Patent Assignment
Reel/Frame 036042/0212

ASSIGNMENT OF ASSIGNOR'S INTEREST

Recorded: 2015-07-01 Received: 2015-07-01 Pages: 153
Assignor
SPANSION, LLC
Executed: 2015-06-01
Assignee
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT, SAN JOSE, CA, 95134, UNITED STATES
Covered Applications (52)
METHOD OF COLLECTING DATA USING AN EMBEDDED MEDIA PLAYER PAGE
App. No. 12/943,724
EDGE TERMINATION FOR SEMICONDUCTOR DEVICE
App. No. 11/914,648
SEMICONDUCTOR DEVICE AND METHOD FOR BOOSTING WORD LINE
App. No. 12/406,845
DC-DC CONVERTER AND CONTROL CIRCUIT FOR DC-DC CONVERTER
App. No. 12/257,222
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE BY CONSIDERING THE EXTINCTION COEFFICIENT DURING ETCHING OF AN INTERLAYER INSULATING FILM
App. No. 12/253,035
EEPROM EMULATION IN FLASH DEVICE
App. No. 12/234,734
DYNAMIC ERASE STATE IN FLASH DEVICE
App. No. 12/234,736
SEMICONDUCTOR DEVICE AND ITS CONTROL METHOD
App. No. 12/283,722
SEMICONDUCTOR INTEGRATED CIRCUIT AND DEBUG MODE DETERMINATION METHOD
App. No. 12/232,178
METHOD AND APPARATUS FOR ADDRESS ALLOTTING AND VERIFICATION IN A SEMICONDUCTOR DEVICE
App. No. 12/199,684
U-SHAPED SONOS MEMORY HAVING AN ELEVATED SOURCE AND DRAIN
App. No. 12/192,945
FLASH MEMORY DEVICE WITH WORD LINES OF UNIFORM WIDTH AND METHOD FOR MANUFACTURING THEREOF
App. No. 12/179,400
SYNCHRONOUS MEMORY DEVICES AND CONTROL METHODS FOR PERFORMING BURST WRITE OPERATIONS
App. No. 12/176,997
NONVOLATILE MEMORY DEVICE HAVING A PLURALITY OF MEMORY BLOCKS
App. No. 12/177,039
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THEREOF
App. No. 12/217,096
SEMICONDUCTOR DEVICE AND METHOD FOR CONTROLLING A SEMICONDUCTOR DEVICE
App. No. 12/166,288
NON-VOLATILE MEMORY STRING MODULE WITH BUFFER AND METHOD
App. No. 12/134,898
SEMICONDUCTOR DEVICE AND CONTROLLING METHOD FOR THE SAME
App. No. 12/130,583
STRUCTURE, METHOD AND SYSTEM FOR ASSESSING BONDING OF ELECTRODES IN FCB PACKAGING
App. No. 12/122,556
BITCELL CURRENT SENSE DEVICE AND METHOD THEREOF
App. No. 12/114,966
OPTICAL ERASE MEMORY STRUCTURE
App. No. 12/106,180
BITLINE VOLTAGE DRIVER
App. No. 12/057,203
IEEE 1394 TRANSMITTER, IEEE 1394 RECEIVER AND AUDIO DATA CONTENT TRANSMISSION METHOD
App. No. 12/046,684
SEMICONDUCTOR DEVICE AND METHOD FOR ADJUSTING REFERENCE LEVELS OF REFERENCE CELLS
App. No. 12/026,417
ELECTRONIC DEVICE INCLUDING A GATE ELECTRODE HAVING PORTIONS WITH DIFFERENT CONDUCTIVITY TYPES AND A PROCESS OF FORMING THE SAME
App. No. 12/020,316
NON-VOLATILE MEMORY DEVICE AND METHODS OF USING
App. No. 11/972,312
METHOD TO PREVENT ALLOY FORMATION WHEN FORMING LAYERED METAL OXIDES BY METAL OXIDATION
App. No. 12/004,124
CLOCK ENCODED PRE-FETCH TO ACCESS MEMORY DATA IN CLUSTERING NETWORK ENVIRONMENT
App. No. 11/957,027
CONTROL CIRCUIT FOR DETECTING A REVERSE CURRENT IN A DC-DC CONVERTER
App. No. 11/937,822
CONTROLLED BIT LINE DISCHARGE FOR CHANNEL ERASES IN NONVOLATILE MEMORY
App. No. 11/935,717
CONTROL OF TEMPERATURE SLOPE FOR BAND GAP REFERENCE VOLTAGE IN A MEMORY DEVICE
App. No. 11/929,097
SPLIT CHARGE STORAGE NODE INNER SPACER PROCESS
App. No. 11/873,822
APPARATUS, METHOD, AND SYSTEM FOR CONTROLLING STEPPING MOTOR
App. No. 11/892,841
USE OF A POLYMER SPACER AND SI TRENCH IN A BITLINE JUNCTION OF A FLASH MEMORY CELL TO IMPROVE TPD CHARACTERISTICS
App. No. 11/835,538
SYSTEM AND METHOD FOR REDUCING PROCESS-INDUCED CHARGING
App. No. 11/782,507
PROCESS APPLYING DIE ATTACH FILM TO SINGULATED DIE
App. No. 11/767,623
METHOD TO OBTAIN MULTIPLE GATE THICKNESSES USING IN-SITU GATE ETCH MASK APPROACH
App. No. 11/741,998
TRIPLE POLY-SI REPLACEMENT SCHEME FOR MEMORY DEVICES
App. No. 11/742,003
DC-DC CONVERTER WITH OSCILLATOR AND MONITORING FUNCTION
App. No. 11/790,693
STATE CHANGE SENSING
App. No. 11/687,487
SELF-ALIGNED PATTERNING METHOD BY USING NON-CONFORMAL FILM AND ETCH BACK FOR FLASH MEMORY AND OTHER SEMICONDUCTOR APPLICATIONS
App. No. 11/653,649
SEMICONDUCTOR MEMORY COMPRISING DUAL CHARGE STORAGE NODES AND METHODS FOR ITS FABRICATION
App. No. 11/613,513
ERASING FLASH MEMORY USING ADAPTIVE DRAIN AND/OR GATE BIAS
App. No. 11/612,863
CONTROL CIRCUIT OF POWER SUPPLY, POWER SUPPLY AND CONTROL METHOD THEREOF
App. No. 11/516,611
MEMORY CELL CONTAINING COPOLYMER CONTAINING DIARYLACETYLENE PORTION
App. No. 11/462,525
RECONFIGURABLE CIRCUIT
App. No. 11/442,971
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
App. No. 11/414,646
METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE
App. No. 11/378,464
ACTIVE FILTER IN PLL CIRCUIT
App. No. 11/318,608
DIGITAL DATA TRANSFER BETWEEN DIFFERENT CLOCK DOMAINS
App. No. 11/242,215
MEMORY DEVICE WITH IMPROVED DATA RETENTION
App. No. 11/089,708
MEMORY CONTROL CIRCUIT AND MICROPROCESSORY SYSTEM FOR PRE-FETCHING INSTRUCTIONS
App. No. 11/024,843