Patent Assignment
Reel/Frame 050799/0215
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded: 2019-10-23
Received: 2019-10-23
Pages: 8
Assignor
CYPRESS SEMICONDUCTOR CORPORATION
Executed: 2019-09-25
Assignee
LONGITUDE FLASH MEMORY SOLUTIONS LIMITED
BRACKEN ROAD, SANDYFORD, FIRST FLOOR, BLACKTHORN EXCHANGE, DUBLIN, IEX, D18 P3Y9, IRELAND
Covered Applications
(19)
Restoring ECC syndrome in non-volatile memory devices
App. No. 14/799,455
→
PARTIAL LOCAL SELF BOOSTING FOR NAND
App. No. 14/132,430
→
RESTORING ECC SYNDROME IN NON-VOLATILE MEMORY DEVICES
App. No. 13/860,542
→
PARTIAL LOCAL SELF BOOSTING FOR NAND
App. No. 12/783,351
→
MEMORY DEVICE
App. No. 12/548,034
→
SEMICONDUCTOR DEVICE AND METHOD FOR BOOSTING WORD LINE
App. No. 12/406,845
→
VOLTAGE BOOSTER BY ISOLATION AND DELAYED SEQUENTIAL DISCHARGE
App. No. 12/014,454
→
TRIPLE POLY-SI REPLACEMENT SCHEME FOR MEMORY DEVICES
App. No. 11/742,003
→
SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD
App. No. 11/789,888
→
SEMICONDUCTOR DEVICE AND METHOD FOR BOOSTING WORD LINE
App. No. 11/502,957
→
SEMICONDUCTOR DEVICE AND PROGRAMMING METHOD THEREFOR
App. No. 11/414,647
→
METHODS FOR FABRICATING SEMICONDUCTOR DEVICES AND CONTACTS TO SEMICONDUCTOR DEVICES
App. No. 11/227,657
→
METHOD OF PROGRAMMING A MEMORY DEVICE
App. No. 11/146,690
→
MULTIPLE DUAL BIT MEMORY INTEGRATED CIRCUIT SYSTEM
App. No. 11/059,139
→
SOFT ERROR RESISTANT MEMORY CELL AND METHOD OF MANUFACTURE
App. No. 10/823,529
→
MEMORY DEVICE WITH AN ALTERNATING VSS INTERCONNECTION
App. No. 10/823,972
→
METHOD AND STRUCTURE FOR CONTROLLING FLOATING BODY EFFECTS
App. No. 10/756,585
→
SEMICONDUCTOR DEVICE WITH HIGH CONDUCTIVITY REGION USING SHALLOW TRENCH
App. No. 10/151,595
→
METHOD AND APPARATUS FOR BOOSTING BITLINES FOR LOW VCC READ
App. No. 09/873,643
→