Memory device and method
View Patent ↗During first portion of a first read cycle determining that a first input of a sense amplifier is to receive information based upon a state of a storage cell during a first portion of a read cycle, and determining that a conductance at the first input is substantially equal to a conductance at a second input of the sense amplifier during the first portion. A plurality of NAND string modules are connected to a global bit line of a memory device that includes a memory column where a plurality of NAND strings and a buffer are formed.
1. A method comprising:
forming a first active region having a length and a width;
forming a second active region immediately adjacent in a width dimension to the first active region, the second active region having the width;
forming a first NAND string including a first portion of the first active region;
forming a second NAND string including a first portion of the second active region; and
forming a first multiplexer including a second portion of the first active region, wherein information at a storage cell of the first NAND string is communicated to a first input of a sense amplifier via the first multiplexer during a first read operation, and information at a storage cell of the second NAND string is communicated to the first input of the sense amplifier via the first multiplexer during a second read operation.
2. The method of claim 1 further comprising:
forming a first buffer including a third portion of the first active region, wherein information at the storage cell of the first NAND string is communicated to the first input of the sense amplifier via the first buffer during the first read operation, and information at the storage cell of the second NAND string is communicated to the first input of the sense amplifier via the first buffer during the second read operation.
3. The method of claim 2 further comprising:
forming a first bias device including a portion of at least one of a fourth portion of the first active region or a second portion of the second active region, the first bias device to bias a node electrically connected to an input of the first buffer.
4. The method of claim 3 , further comprising:
forming a third active region adjacent in the width dimension to the first active region, the third active region having the width;
forming a fourth active region immediately adjacent in the width dimension to the third active region, the fourth active region having the width;
forming a third NAND string including a first portion of the third active region;
forming a fourth NAND string including a first portion of the fourth active region;
forming a second multiplexer including a second portion of the third active region, wherein information at a storage cell of the third NAND string is communicated to a second input of the sense amplifier during a third read operation, and information at a storage cell of the fourth NAND string is communicated to the second input of the sense amplifier during a fourth read operation.
5. The method of claim 4 further comprising:
forming a second buffer including a third portion of the third active region, wherein information at the storage cell of the third NAND string is communicated to the second input of the sense amplifier via the second buffer during the third read operation, and information at the storage cell of the fourth NAND string is communicated to the second input of the sense amplifier via the second buffer during the fourth read operation.
6. The method of claim 5 , wherein
forming the first multiplexer comprises forming the first multiplexer to prevent information at the storage cell of the first NAND string and information at the storage cell of the second NAND string from being communicated to the first input of the sense amplifier during the third read operation and during the fourth read operation.
7. The method of claim 6 , wherein:
forming the first bias device comprises forming the first bias device to bias the input of the first buffer during the third read operation and during the fourth read operation to provide a reference signal to the first input of the sense amplifier, the reference signal to facilitate the sense amplifier reading information at the third NAND string during the third read operation and to facilitate the sense amplifier reading information at the fourth NAND string during the fourth read operation.
8. The method of claim 1 , further comprising:
forming a third active region adjacent in the width dimension to the first active region, the third active region having the width;
forming a fourth active region immediately adjacent in the width dimension to the third active region, the fourth active region having the width;
forming a third NAND string including a first portion of the third active region;
forming a fourth NAND string including a first portion of the fourth active region; and
forming a first bias device to facilitate providing a reference signal to a second input of the sense amplifier during the first read operation, the first bias device including a second portion of the third active region.
9. The method of claim 1 , further comprising:
forming a third NAND string including a third portion of the first active region;
forming a fourth NAND string including a second portion of the second active region;
forming a second multiplexer including a fourth portion of the first active region, wherein information at a storage cell of the third NAND string is communicated to the first input of the sense amplifier during a third read operation, and information at a storage cell of the fourth NAND string is communicated to the first input of the sense amplifier during a fourth read operation, and
wherein the second portion of the first active region is between the first and fourth portions of the first active region, and the fourth portion of the first active region is between the second and third portions of the first active region.
10. The method of claim 1 , further comprising:
forming a third NAND string including a third portion of the first active region, wherein information at a storage cell of the third NAND string is communicated to the first input of the sense amplifier via a first input of the first multiplexer during a third read operation, and information at the storage cell of the first NAND string is communicated to the first input of the sense amplifier via the first input of the first multiplexer during the first read operation.
11. A method comprising:
forming a first active region having a width;
forming a second active region immediately adjacent in a width dimension to the first active region, the second active region having the width;
forming a first NAND string including a first portion of the first active region;
forming a second NAND string including a first portion of the second active region;
forming a first buffer including a second portion of the first active region, wherein information at a storage cell of the first NAND string is to be communicated to a first input of a sense amplifier via the first buffer during a first read operation, and wherein information at a storage cell of the second NAND string is to be communicated to the first input of the sense amplifier via the first buffer during a second read operation.
12. A device comprising:
a first active region having a length and a width;
a second active region immediately adjacent in a width dimension to the first active region, the second active region having the width;
a first NAND string including a first portion of the first active region;
a second NAND string including a first portion of the second active region; and
a first multiplexer including a second portion of the first active region, wherein information at a storage cell of the first NAND string is communicated to a first input of a sense amplifier via the first multiplexer during a first read operation, and information at a storage cell of the second NAND string is communicated to the first input of the sense amplifier via the first multiplexer during a second read operation.
13. The device of claim 12 further comprising:
a first buffer including a third portion of the first active region, wherein information at the storage cell of the first NAND string is communicated to the first input of the sense amplifier via the first buffer during the first read operation, and information at the storage cell of the second NAND string is communicated to the first input of the sense amplifier via the first buffer during the second read operation.
14. The device of claim 13 further comprising:
a first bias device including a portion of at least one of a fourth portion of the first active region or a second portion of the second active region, the first bias device to bias a node electrically connected to an input of the first buffer.
15. The device of claim 14 , further comprising:
a third active region adjacent in the width dimension to the first active region, the third active region having the width;
a fourth active region immediately adjacent in the width dimension to the third active region, the fourth active region having the width;
a third NAND string including a first portion of the third active region;
a fourth NAND string including a first portion of the fourth active region; and
a second multiplexer including a second portion of the third active region, wherein information at a storage cell of the third NAND string is communicated to a second input of the sense amplifier during a third read operation, and information at a storage cell of the fourth NAND string is communicated to the second input of the sense amplifier during a fourth read operation.
16. The device of claim 15 further comprising:
a second buffer including a third portion of the third active region, wherein information at the storage cell of the third NAND string is communicated to the second input of the sense amplifier via the second buffer during the third read operation, and information at the storage cell of the fourth NAND string is communicated to the second input of the sense amplifier via the second buffer during the fourth read operation.
17. The device of claim 16 , wherein the first multiplexer is further to prevent information at the storage cell of the first NAND string and information at the storage cell of the second NAND string from being communicated to the first input of the sense amplifier during the third read operation and during the fourth read operation, and the first bias device is to bias the input of the buffer during the third read operation and during the fourth read operation to provide a reference signal to the first input of sense amplifier, the reference signal to facilitate the sense amplifier reading information at the third NAND string during the third read operation and to facilitate the sense amplifier reading information at the fourth NAND string during the fourth read operation.
18. The device of claim 12 , further comprising:
a third active region adjacent in the width dimension to the first active region, the third active region having the width;
a fourth active region immediately adjacent in the width dimension to the third active region, the fourth active region having the width;
a third NAND string including a first portion of the third active region;
a fourth NAND string including a first portion of the fourth active region; and
a first bias device to facilitate providing a reference signal to a second input of the sense amplifier during the first read operation, the first bias device including a second portion of the third active region.
19. The device of claim 12 , further comprising:
a third NAND string including a third portion of the first active region;
a fourth NAND string including a second portion of the second active region;
a second multiplexer including a fourth portion of the first active region, wherein information at a storage cell of the third NAND string is communicated to the first input of the sense amplifier during a third read operation, and information at a storage cell of the fourth NAND string is communicated to the first input of the sense amplifier during a fourth read operation, and
wherein the second portion of the first active region is between the first and fourth portions of the first active region, and the fourth portion of the first active region is between the second and third portions of the first active region.
20. The device of claim 12 , further comprising:
a third NAND string including a third portion of the first active region, wherein information at a storage cell of the third NAND string is communicated to the first input of the sense amplifier via a first input of the first multiplexer during a third read operation, and information at the storage cell of the first NAND string is communicated to the first input of the sense amplifier via the first input of the first multiplexer during the first read operation.