IP Library Granted Patent US 7,898,879
Granted Patent B2
US 7,898,879 · App. 12/574,427 · Granted Mar 1, 2011

Semiconductor device and control method of the same

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Quick Facts
Patent No.
US 7,898,879
App. No.
12/574,427
Granted
Mar 1, 2011
Kind
B2
Abstract

The present invention is a semiconductor device including: a resistor R 11 (first resistor part) and an FET 15 (second resistor part) connected in series between a power supply Vcc (first power supply) and ground (second power supply); an output node N 11 provided between the resistor R 11 and FET 15 and used for outputting a reference voltage; a feedback node N 12 provided between the power supply Vcc and the ground; and a voltage control circuit ( 19 ) that maintains a voltage of the feedback node N 12 at a constant level by using the reference voltage of the output node N 11 and the voltage of the feedback node N 12 . The present invention can provide a semiconductor device having a reference voltage generating circuit capable of generating the reference voltage that does not greatly depend on a power supply voltage and its control method.

Claims (5)

1. A method of controlling a semiconductor device equipped with first and second resistor parts connected in series between a first power supply and a second power supply; an output node provided between the first and second resistor parts, a reference voltage being output via the output node; and a feedback node provided between the first power supply and the first resistor part, the method comprising the steps of:

maintaining a voltage of the feedback node at a constant level by using the reference voltage of the output node and the voltage of the feedback node wherein the feedback node comprises a node that couples first and second transistors; and

outputting the reference voltage via the output node.

2. The method as claimed in claim 1 , further comprising a step of generating a voltage applied to a memory cell using the reference cell.

3. The method as claimed in claim 1 , further comprising a step of reading data from the memory cell.

Assignments (8)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 15, 2022
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES LLC
Reel/Frame 059721/0467 →
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036050/0174 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →