Multiple programming of spare memory region for nonvolatile memory
Structures, methods, and systems for multiple programming of spare memory region for nonvolatile memory are disclosed. In one embodiment, a nonvolatile memory system comprises a main memory cell array, a spare memory cell array, and a memory controller that divides the spare memory cell array into at least a first region and a second region. The system further comprises a selection module for selecting the main memory cell array and the first region to write data and the first reference cell to write first reference data associated with the data during an initial data writing operation and for selecting the second region to write additional data and the second reference cell to write second reference data associated with the additional data during an additional data writing operation.
1. A nonvolatile memory device, comprising:
a main memory cell array;
a spare memory cell array divided into a first region and a second region;
a first reference cell associated with the main memory and the first region of the spare memory cell;
a second reference cell associated with the second region of the spare memory cell; and
a selection module for selecting the main memory cell array and the first region to write data and the first reference cell to write first reference data associated with the data during an initial data writing operation and for selecting the second region to write additional data and the second reference cell to write second reference data associated with the additional data during an additional data writing operation.
2. The nonvolatile memory device according to claim 1 , wherein the selection module selects the first reference cell when reading the data from the main memory cell array and from the first region, and selects the second reference cell when reading the additional data from the second region.
3. The nonvolatile memory device according to claim 2 , wherein the selection module comprises a comparator circuit which compares a division address that divides the first region and the second region with an address signal to determine which of the first region and the second region is a destination associated with the address signal.
4. The nonvolatile memory device according to claim 3 , wherein the selection module comprises a first selector for selecting the first reference cell when the destination is the first region, and for selecting the second reference cell when the destination is the second region.
5. The nonvolatile memory device according to claim 3 , wherein the selection module comprises a second selector which switches between the first region and the second region based on a comparison by the comparator circuit.
6. The nonvolatile memory device according to claim 3 , wherein the selection module comprises an address register which holds the division address and forwards the division address to the comparator circuit.
7. The nonvolatile memory device according to claim 4 , wherein the selection module comprises a third selector which is used to forward the first reference data and the second reference data to the first selector during the initial writing operation and the additional writing operation, respectively, and is used to forward the reference data from the first selector to a sense amplifier during the reading of the data or the additional data.
8. The nonvolatile memory device according to claim 3 , wherein the selection module comprises a fourth selector which is used to forward the data and the additional data for the spare memory to the second selector during the initial writing operation and the additional writing operation, respectively, and is used to forward the data and the additional data for the spare memory from the second selector to a sense amplifier during the reading of the data and the additional data, respectively.
9. The nonvolatile memory device according to claim 3 , wherein the address signal comprises a flag signal which indicates which of the main memory cell array and the spare memory cell array is a destination being accessed.
10. The nonvolatile memory device according to claim 9 , further comprising a writing circuit which generates:
main memory cell array data when the main memory cell array is the destination; and
spare memory cell array data when the spare memory cell array is the destination.
11. The nonvolatile memory device according to claim 9 , comprising a sense amplifier which forwards:
the main memory cell array data if the data is to be read from the main memory cell array; and
the spare memory cell array data when the data is to be read from the spare memory cell array.
12. The nonvolatile memory device according to claim 9 , wherein the flag signal is the most significant bit of a column address of the address signal.
13. The nonvolatile memory device according to claim 1 , wherein the nonvolatile memory device is a flash memory with a NAND interface.
14. A method for controlling a nonvolatile memory device having a first reference cell associated with a main memory cell array and a second reference cell associated to a spare memory cell array, comprising:
dividing the spare memory cell array into at least a first region and a second region;
selecting the main memory cell array and the first region as a destination for writing data and selecting the first reference cell as a destination for writing first reference data during an initial data writing operation; and
selecting the second region as a destination for writing additional data and selecting the second reference cell as a destination for writing second reference data during an additional data writing operation.
15. The method for controlling the nonvolatile memory device according to claim 14 , comprising:
selecting the first reference cell when reading the data from the main memory cell array and the first region; and
selecting the second reference cell when reading the additional data from the second region.
16. A nonvolatile memory system, comprising:
a main memory cell array;
a spare memory cell array;
a memory controller that divides the spare memory cell array into at least a first region and a second region; and
a selection module for selecting the main memory cell array and the first region to write data and the first reference cell to write first reference data associated with the data during an initial data writing operation and for selecting the second region to write additional data and the second reference cell to write second reference data associated with the additional data during an additional data writing operation.
17. The nonvolatile memory system according to claim 16 , wherein the selection module selects the first reference cell when reading the data from the main memory cell array and from the first region, and selects the second reference cell when reading the additional data from the second region.
18. The nonvolatile memory system according to claim 17 , wherein the selection module comprises a comparator circuit which compares a division address that divides the first region and the second region with an address signal to determine which of the first region and the second region is a destination associated with the address signal.
19. The nonvolatile memory system according to claim 18 , wherein the selection module comprises a first selector for selecting the first reference cell when the destination is the first region, and for selecting the second reference cell when the destination is the second region, and a second selector which switches between the first region and the second region based on a result of comparison by the comparator circuit.
20. The nonvolatile memory device according to claim 18 , wherein the selection module comprises a third selector which is used to forward the first reference data and the second reference data to the first selector during the initial writing operation and the additional writing operation, respectively, and is used to forward the reference data from the first selector to a sense amplifier during the reading of the data or the additional data, and a fourth selector which is used to forward the data and the additional data for the spare memory to the second selector during the initial writing operation and the additional writing operation, respectively, and is used to forward the data and the additional data for the spare memory from the second selector to a sense amplifier during the reading of the data and the additional data, respectively.