Phase change memory and method therefor
View Patent ↗Briefly, in accordance with an embodiment of the invention, a phase change memory and a method to manufacture a phase change memory is provided. The phase change memory may include a memory material and a first tapered contact adjacent to the memory material. The phase change memory may further include a second tapered contact separated from the first tapered contact and adjacent to the memory material, wherein the first and second tapered contacts are adapted to provide a signal to the memory material.
1. An apparatus, comprising:
a memory material;
a first tapered contact adjacent to the memory material;
a second tapered contact separated from the first tapered contact and adjacent to the memory material, wherein the first and second tapered contacts are adapted to provide a signal to the memory material; and
insulating material formed between the memory material and the first tapered contact and formed between the memory material and the second tapered contact.
2. The apparatus of claim 1 , wherein the first tapered contact is wedge-shaped and the second tapered contact is wedge-shaped.
3. The apparatus of claim 1 , wherein the first tapered contact and the second tapered contact are separated by a sub-lithographic distance.
4. The apparatus of claim 1 , wherein the first tapered contact and the second tapered contact are separated by a distance of less than about 1000 angstroms.
5. The apparatus of claim 1 , wherein the first tapered contact tapers to a point adjacent to the memory material and the second contact tapers to a point adjacent to the memory material.
6. The apparatus of claim 5 , wherein the point of the first tapered contact has a dimension that is less than about 500 angstroms.
7. The apparatus of claim 1 , wherein a portion of the insulating material adjacent to the points of the first and second tapered contacts breaks down and conducts electrical current in response to an electric field generated by applying a voltage potential to the first contact and the second contact, wherein the voltage potential is greater than a breakdown voltage of the insulating material.
8. The apparatus of claim 1 , wherein the insulating material is silicon nitride.
9. The apparatus of claim 1 , wherein the first tapered contact is a lateral contact and wherein the second tapered contact is a lateral contact.
10. The apparatus of claim 1 , wherein the memory material, the first tapered contact, and the second tapered contact are formed over a substrate and wherein the first tapered contact is a tapered and substantially planar layer that is substantially parallel to a top surface of the substrate and the second tapered contact is a tapered and substantially planar layer that is substantially parallel to the top surface of the substrate.
11. The apparatus of claim 1 , wherein the first tapered contact is an elongated, substantially planar layer formed substantially parallel to a surface of a substrate.
12. The apparatus of claim 1 , wherein the memory material is a phase change material.
13. The apparatus of claim 1 , wherein the memory material is a programmable resistive material.
14. The apparatus of claim 1 , wherein the memory material is a non-volatile memory material adapted to be altered to one of at least two resistance values within a range of resistance values in response to an electrical signal so as to provide single bit or multi-bit storage of information.
15. The apparatus of claim 1 , wherein the memory material is a chalcogenide material.
16. The apparatus of claim 1 , wherein the memory material is an ovonic material.
17. The apparatus of claim 1 , wherein the memory material comprises tellurium.
18. The apparatus of claim 1 , wherein the memory material is a tellurium, antimony, germanium alloy.
19. The apparatus of claim 1 , wherein the first tapered contact is formed from an electrically conductive material and the second tapered contact is formed from the electrically conductive material.
20. The apparatus of claim 1 , wherein the first and second tapered contacts comprise nitride.
21. The apparatus of claim 1 , wherein the first tapered contact is a layer of TiAlN and the second tapered contact is a layer of TiAlN.
22. The apparatus of claim 1 , wherein the first tapered contact is coupled to a first address line and the second tapered contact is coupled to a second address line.
23. The apparatus of claim 1 , wherein the first address line is a layer of aluminum and the second address line is a layer of aluminum, and wherein the first address line is orthogonal to the second address line.
24. The apparatus of claim 1 , further including an isolation device coupled between the first address line and the memory material.