Isolating phase change memory devices
View Patent ↗A phase change memory may be made using an isolation diode in the form of a Schottky diode between a memory cell and a word line. The use of Schottky diode isolation devices may make the memory more scaleable in some embodiments.
1. A phase change memory comprising:
a bulk substrate;
a chalcogenide phase change memory cell formed over said bulk substrate; and
an isolation diode in the form of a Schottky diode including a contact formed on and in contact with a region of said bulk substrate, said bulk substrate region having a background doping level silicon, the region under said contact being free of any p-n junction.
2. The memory of claim 1 wherein said isolation diode includes the contact wherein the contact is made of metallic material.
3. The memory of claim 1 wherein said isolation diode includes the contact wherein the contact is made of silicide material.
4. The memory of claim 1 wherein said Schottky diode is surrounded by an isolation region, said Schottky diode includes the contact wherein the contact is made of metallic material.
5. The memory of claim 1 wherein said background doping level is less than or equal to 10 17 atoms per cubic centimeter.
6. The memory of claim 1 wherein said memory cell is coupled to a bitline and to said isolation diode and said isolation diode is connected to a word line.
7. The memory of claim 1 wherein said isolation diode is surrounded by an isolation region.
8. The memory of claim 1 including an isolation diode coupled to a word line, said isolation diode including a substrate having a background doping level.
9. A method comprising:
forming chalcogenide phase change memory cells over a bulk semiconductor substrate having a background doping level less than or equal to 10 17 atoms per cubic centimeter;
forming a Schottky diode by forming a contact on and in contact with a region of said substrate having a background doping level, such that there is no p-n junction under said diode;
surrounding the Schottky diode by an isolation region;
forming said contact to extend over said isolation region; and
coupling one of said cells to another of said cells through said Schottky diode.
10. The method of claim 9 including coupling said Schottky diode between a memory cell and a word line.
11. A phase change memory comprising:
a bulk semiconductor substrate;
a chalcogenide phase change memory cell formed over said substrate;
a word line; and
a Schottky diode between said word line and said memory cell, an oxide isolation region around said diode, said diode including a contact, said contact extending over said isolation region, said contact formed on and in contact with a region of said substrate having a background doping level less than or equal to 10 17 atoms per cubic centimeter, there being no p-n junction under said contact.
12. The memory of claim 11 wherein said word line is formed as a doped region in said substrate.
13. A system comprising:
a processor;
a memory coupled to said processor, said memory including a chalcogenide phase change memory cell formed over a bulk semiconductor substrate and an isolation diode in the form of a Schottky diode including a contact formed on said substrate, an oxide isolation region around said diode, said contact extending over said isolation region, said substrate under said contact having a doping level less than or equal to 10 17 atoms per cubic centimeter, there being no p-n junction under said contact; and
a wireless interface coupled to said processor.
14. The system of claim 13 including a word line, said Schottky diode being between the word line and memory cell.