IP Library Granted Patent US 6,903,008
Granted Patent B2
US 6,903,008 · App. 10/320,582 · Granted Jun 7, 2005

Method for forming an interconnection in a semiconductor element

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,903,008
App. No.
10/320,582
Granted
Jun 7, 2005
Kind
B2
Abstract

There is disclosed a method for forming an interconnection in the semiconductor element, including a process for forming a groove 117 on an underlying substrate so as to correspond to the designed pattern, a process for forming an underlayer to improve crystalline of an interconnection which will be formed in the succeeding stage on said underlying substrate with said groove, a process for forming a thin film of the interconnection material, a heat-treatment process to fill the said groove with the thin film of the interconnection material formed on the underlying substrate, and a process for forming the interconnection by polishing the surface of the thin film by predetermined quantity.

Claims (12)

1. A method for forming a semiconductor element, comprising:

forming a groove having a bottom wall and side walls in a surface of an insulating film;

sequentially forming a first layer and a second layer over the surface of the insulating film and over the bottom wall and side walls of the groove in a first chamber, wherein the first layer is made of a high melting-point metal and the second layer is made of a nitride of the high melting-point metal, wherein a thickness of the first layer is formed to be thinner than a thickness of the second layer, wherein a combined thickness of the first and second layers formed over the side walls of the groove is thinner than a combined thickness of the first and second layers formed over the surface of the insulating film, and wherein the combined thickness of the first and second layers formed over the side walls of the groove is thinner than a combined thickness of the first and second layers formed over the bottom wall of the groove;

forming a conductive layer over the surface of the insulating film and within the groove in a second chamber, wherein the conductive layer includes copper, and wherein the first and second layers are interposed between the conductive layer and the insulating film; and

chemically and/or mechanically polishing the conductive layer to remove the conductive layer formed over the surface of the insulating film.

2. The method as claimed in claim 1 , wherein said polishing further removes the first and second layers over the surface of the insulating film.

3. The method as claimed in claim 1 , wherein the high melting-point metal is titanium.

4. The method as claimed in claim 2 , wherein the high melting-point is titanium.

5. The method as claimed in claim 1 , wherein the first and second layers are formed by respective first and second sputtering processes.

6. The method as claimed in claim 5 , wherein the second layer is formed by discharging a nitride gas during the second sputtering process.

7. The method as claimed in claim 1 , wherein the first and second layers are formed by respective first and second ion metal plasma sputtering processes.

8. The method as claimed in claim 7 , wherein the second layer is formed by discharging a nitride gas during the second ion metal plasma sputtering process.

Assignments (2)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →
CHANGE OF NAME Recorded Feb 26, 2009
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022343/0290 →