Method and apparatus utilizing direct digital synthesizer and spread spectrum techniques for reducing EMI in digital display devices
A DDS circuit arranged to provide a selectable spread spectrum based output clock signal is described. The synthesizer includes a phase accumulator circuit, a reference clock source coupled to the phase accumulator circuit arranged to provide a reference clock signal, a frequency shifter unit coupled to the phase accumulator, a nominal phase source coupled to the phase accumulator coupled to the frequency shifter unit arranged to provide a nominal phase signal, and a modulated phase source coupled to the frequency shifter unit arranged to provide a modulation signal. The frequency shifter unit combines the nominal phase signal and the modulation signal to form a frequency shift signal as input to the phase accumulator which uses the frequency shift signal to sample the reference clock signal so as to produce the output clock signal having a central frequency and a frequency spread based upon the modulation signal.
1. A clock synthesizer circuit arranged to provide a selectable spread spectrum based output clock signal, comprising:
a phase accumulator;
a reference clock source coupled to the phase accumulator circuit arranged to provide a reference clock signal;
an adder unit coupled to the phase accumulator;
a nominal phase source coupled to the adder unit arranged to provide a nominal phase signal; and
a modulated phase source coupled to the adder unit arranged to provide a phase modulation signal, wherein the adder unit combines the nominal phase signal and the phase modulation signal to form a frequency shift signal as input to the phase accumulator that uses the frequency shift signal to sample the reference clock signal so as to produce the output clock signal having a central frequency about the same as the reference clock signal and an associated frequency spread based on the phase modulation signal.
2. A circuit as recited in claim 1 , wherein the phase modulation signal is a periodic bipolar signal taking the form of a symmetric positive and negative-going waveform having an average value of about zero.
3. A circuit as recited in claim 2 further comprising:
a frequency spread selector for selecting a frequency spread:
a selectable bipolar counter selected based upon the selected frequency spread; and
a bipolar counter signal generator for generating a bipolar counter signal based upon the selected bipolar counter.
4. A circuit as recited in claim 3 , wherein the adder combines the reference signal and the bipolar counter signal.
5. A circuit as recited in claim 1 , wherein the phase accumulator circuit is coupled to a read only memory (ROM) look up table.
6. A circuit as recited in claim 5 , wherein the ROM look up table includes sinusoidal magnitude values.
7. A circuit as recited in claim 6 , wherein a sampled output of the phase accumulator provides an input signal to the ROM look up table in order to convert the sampled output signal to a sinusoidal magnitude signal.
8. A method of providing a selectable spread spectrum based output clock signal, comprising:
providing a reference clock signal;
providing a nominal phase signal;
providing a phase modulation signal;
combining the nominal phase signal and the phase modulation signal to form a frequency shift signal; and
Sampling the reference clock signal using the frequency shift signal so as to produce the output clock signal having a central frequency about the same as the reference clock signal and an associated frequency spread based on the phase modulation signal.
9. A method as recited in claim 8 wherein the phase modulation signal is a periodic bipolar signal taking the form of a symmetric positive and negative-going waveform having an average value of about zero.
10. A method as recited in claim 9 further comprising:
selecting the frequency spread;
selecting a bipolar counter based upon the selected frequency spread;
generating a bipolar counter signal based upon the selected bipolar counter.
11. A method as recited in claim 10 , comprising:
producing the output clock signal by combining the reference signal and the bipolar counter signal.
12. A method as recited in claim 8 , further comprising providing a read only memory (ROM) look up table that includes sinusoidal magnitude values; and
converting the sampled reference clock signal to a sinusoidal magnitude signal based upon the sinusoidal magnitude values included in the ROM lookup table.
13. Computer program product for providing a selectable spread spectrum based output clock signal, comprising:
computer code for providing a reference clock signal;
computer code for providing a nominal phase signal;
computer code for providing a phase modulation signal;
computer code for combining the nominal phase signal and the phase modulation signal to form a frequency shift signal; computer code for sampling the reference clock signal using the frequency shift signal so as to produce the output clock signal having a central frequency about the same as the reference clock signal and an associated frequency spread based on the phase in modulation signal; and
computer readable medium for storing the computer code.
14. Computer program product as recited in claim 13 wherein the phase modulation signal is a periodic bipolar signal taking the form of a symmetric positive and negative-going waveform having an average value of about zero.
15. Computer program product as recited in claim 14 further comprising:
selecting the frequency spread;
selecting a bipolar counter based upon the selected frequency spread; and
generating a bipolar counter signal based upon the selected bipolar counter.
16. Computer program product as recited in claim 15 , comprising: computer code for producing the output clock signal by combining the reference signal and the bipolar counter signal.