IP Library Granted Patent US 6,979,587
Granted Patent B2
US 6,979,587 · App. 10/330,287 · Granted Dec 27, 2005

Image sensor and method for fabricating the same

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Quick Facts
Patent No.
US 6,979,587
App. No.
10/330,287
Granted
Dec 27, 2005
Kind
B2
Abstract

The present invention provides an image sensor capable of suppressing the dark current due to crystalline defects occurring at an edge of a field oxide layer and a method for fabricating the same. The present invention provides an image sensor including: a semiconductor substrate; an active area including a photodiode area formed in a predetermined position of the substrate, a floating diffusion area having a smaller area than the photodiode area and a channel area having a bottle-neck structure connecting to the photodiode area and the floating diffusion area; a field area for isolating electrically the active area; a field stop layer being formed beneath the field area by having a wider area than the field area through an expansion towards the active area with a first width; and a gate electrode formed on the substrate by covering the channel area and having one side superposed with a second width on one entire side of the photodiode contacted to the channel area.

Claims (37)

1. An image sensor, comprising:

a semiconductor substrate;

an active area including a photodiode area formed in a predetermined position of the substrate, a floating diffusion area having a smaller area than the photodiode area and a channel area having a bottle-neck structure connecting to the photodiode area and the floating diffusion area;

a field area for isolating electrically the active area;

a field stop layer being formed beneath the field area and being wider than the field area in a direction towards the active area; and

a gate electrode formed on the substrate by covering the channel area and a portion of the photodiode contacted to the channel area.

2. The image sensor as recited in claim 1 , wherein the photodiode area further includes:

a first diffusion layer formed in the photodiode area by being aligned to one side of the gate electrode and the field stop layer; and

a second diffusion layer formed in the first diffusion layer being aligned to the field stop layer with a predetermined distance from the one side of the gate electrode.

3. The image sensor as recited in claim 1 , wherein the gate electrode is aligned to the floating diffusion area.

4. An image sensor, comprising:

a substrate;

an active area including a photodiode area formed in a predetermined position of the substrate, a floating diffusion area having a smaller area than the photodiode area and a channel area having a bottle-neck structure connecting to the photodiode area and the floating diffusion area;

a field area for isolating electrically the active area;

a field stop layer being formed beneath the field area and being wider than the field area in a direction towards the active area; and

a gate electrode formed on the substrate by covering the channel area and a portion of the photodiode contacted to the channel area.

5. A method for fabricating an image sensor, comprising the steps of:

forming an isolation mask that exposes partially a surface of a substrate;

forming a first diffusion layer having a wider area than an area of the partially exposed substrate;

forming a field oxide layer having a smaller area than the first diffusion layer on the first diffusion layer;

forming a gate electrode on an active area of the substrate defined by the, field oxide layer;

forming a second diffusion layer being aligned to an edge of one side of the gate electrode in the substrate and to the first diffusion layer; and

forming a third diffusion layer being aligned with a predetermined distance from the edge of the one side of the gate electrode formed in the second diffusion layer.

6. The method as recited in claim 5 , wherein the step of forming the first diffusion layer is proceeded with an ion implantation that gives impurities a plurality of rotations or twists with a predetermined tilt angle.

7. The method as recited in claim 5 , wherein the active area of the substrate defined by the field oxide layer includes a photodiode area, a floating diffusion area having a smaller area than the photodiode area and a channel area having a bottle-neck structure connecting the photodiode area and the floating diffusion area,

wherein the gate electrode has one entire side of the floating diffusion area.

8. A method for forming an image sensor, comprising the steps of:

forming a first isolation mask that exposes a portion of a surface of one side of a substrate;

forming a first diffusion layer having a wider area than an exposed area of the substrate;

forming on the substrate a second isolation mask that exposes the other side of the substrate;

forming a second diffusion layer having an area identical to an exposed area of the substrate;

forming on the first diffusion layer a first field oxide layer having a smaller area than the first diffusion layer, and simultaneously forming on the second diffusion layer a second field oxide layer having an area identical to the second diffusion layer;

forming a gate electrode extending on the active area of the substrate and simultaneously on the second field oxide layer;

forming a third diffusion layer being aligned to an edge of one side of the gate electrode in the substrate and the first diffusion layer; and

forming a fourth diffusion layer being aligned with a predetermined distance from the edge of the one side of gate electrode in the third diffusion layer.

9. The method as recited in claim 8 , wherein the step of forming the first diffusion layer is proceeded with an ion implantation that gives impurities a plurality of rotations or twists with a predetermined tilt angle.

10. The method as recited in claim 8 , wherein the step of forming the second diffusion layer is proceeded with an ion implantation that implants impurities vertically.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
MERGER Recorded Jul 22, 2011
From: CROSSTEK CAPITAL, LLC
To: INTELLECTUAL VENTURES II LLC
Reel/Frame 026637/0632 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2009
From: MAGNACHIP SEMICONDUCTOR, LTD.
To: CROSSTEK CAPITAL, LLC
Reel/Frame 022764/0270 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2009
From: HYNIX SEMICONDUCTOR INC.
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 022288/0934 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2002
From: LEE, WON-HO
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 013626/0723 →