Low loss integration of wafer probes with microwave tuners
View Patent ↗This invention relates to the reduction of insertion losses and by consequence maximization of reflection factors for on-wafer load pull testing of high power or low noise transistor chips, using as much a direct integration as possible between the slotted airline of the tuners and low loss probes, said probes being either modified commercial probes or probes made as an extension of the tuner slotted airline itself.
1. A method of low-loss integration of at least one air-based coplanar wafer probe with a manual or automatic tuner by designing, shaping and manufacturing each respective probe in order to form a direct extension of a respective slotted transmission airline of said tuners, in a way as to eliminate any dielectrically loaded coaxial adapter or connector between a tuner test port and a device under test.
2. A method of installing, adjusting and fixing the position, adjusting the characteristic impedance, maintaining and replacing damaged or worn coplanar wafer probes on tuner slablines as described in claim 1 .
3. A method of “in-situ” calibrating automatic microwave tuners permanently fitted with wafer probes as in claim 1 , connected via a Thru line wafer standard in a set-up featuring one or two such tuners on a wafer probe station, flexible cables and a calibrated vector network analyzer.