IP Library Granted Patent US 6,879,234
Granted Patent B2
US 6,879,234 · App. 10/352,048 · Granted Apr 12, 2005

Semiconductor integrated circuit

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Quick Facts
Patent No.
US 6,879,234
App. No.
10/352,048
Granted
Apr 12, 2005
Kind
B2
Abstract

Electrically conductive layers 1 a and 2 a connected to each other via a contact form one inductor, while electrically conductive layers 1 b and 2 b connected to each other via other contact form the other inductor. Since the areas defined by the loops forming these two inductors are equal to each other, the inductances of the inductors are also equal to each other. Between both the inductors, the lengths in the loop of the portions (the conductive layers 1 a and 1 b ) formed on a lower interlayer insulating film are equal to each other, while the lengths in the loop of the portions (the conductive layers 2 a and 2 b ) formed on an upper interlayer insulating film are also equal to each other. This allows external disturbances such as parasitic capacitance to affect both the inductors equally. Accordingly, a voltage controlled oscillator incorporating the invention can stably provide undistorted sinusoidal oscillation signals.

Claims (28)

1. A semiconductor integrated circuit comprising

two power supply lines held at different electric potentials, and

two inductors connected in parallel to each other between said two power supply lines and having the same inductance, said two inductors having an even number of total windings,

wherein said two inductors have at least two electrically conductive layers each formed on an interlayer insulating film, and

ratios of a length of an electrically conductive layer formed on one interlayer insulating film and on the other interlayer insulating film to a total length of the electrically conductive layers constituting said inductors are equal to each other between said two inductors.

2. The semiconductor integrated circuit according to claim 1 , wherein

said two inductors have two electrically conductive layers, and

a ratio of a length of a lower electrically conductive layer and a ratio of a length of an upper electrically conductive layer to a total length of an electrically conductive layer constituting each conductor are equal to each other.

3. The semiconductor integrated circuit according to claim 1 , wherein

one of said two inductors comprises

two first upper electrically conductive layers formed on the same interlayer insulating film and having both end portions spaced apart from each other, and

a first lower electrically conductive layer underlying the first upper electrically conductive layers and having an end portion overlapping with the end portion of said two first upper electrically conductive layers in a plan view,

the other of said two inductors comprises

two second upper electrically conductive layers formed on the same interlayer insulating film as said first upper electrically conductive layers, being the same in total length as said first upper electrically conductive layer, and having both end portions spaced apart from each other, and

a second lower electrically conductive layer underlying the second upper electrically conductive layers and having an end portion overlapping with the end portion of said two second upper electrically conductive layers in a plan view, and

said two inductors intersect each other in a plan view.

4. The semiconductor integrated circuit according to claim 1 , wherein

at least parts of said two inductors overlap each other in a plan view.

5. The semiconductor integrated circuit according to claim 4 , wherein

said two inductors are circular in a plan view, and centers of the circles are aligned with each other.

6. The semiconductor integrated circuit according to claim 4 , wherein

said two inductors are polygonal in a plan view.

7. The semiconductor integrated circuit according to claim 1 , wherein

said at least two electrically conductive layers are connected to each other via a contact.

8. The semiconductor integrated circuit according to claim 7 , wherein

said electrically conductive layers are wider at a region where said contact is provided than at other portions.

9. The semiconductor integrated circuit according to claim 1 , wherein

said two inductors are connected to a varactor diode of a voltage controlled oscillator.

Assignments (3)
CHANGE OF NAME Recorded Dec 22, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025525/0163 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2003
From: FURUMIYA, MASAYUKI; YAMAMOTO, RYOTA; KISHI, JUN; OHKUBO, HIROAKI; NAKASHIBA, YASUTAKA
To: NEC ELECTRONICS CORPORATION
Reel/Frame 014029/0800 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 26, 2003
From: FURUMIYA, MASAYUKI; YAMAMOTO, RYOTA; KISHI, JUN; OHKUBO, HIROAKI; NAKASHIBA, YASUTAKA
To: NEC ELECTRONICS CORPORATION
Reel/Frame 013708/0313 →