I/O interface anti-resonance passband shunting technique
View Patent ↗A method and apparatus for regulating resonance in a computer system I/O interface is provided. A shunting impedance/resistance is arranged across a power supply of the I/O interface. The shunting impedance/resistance is controlled by circuitry that is arranged to detect voltage overshoot conditions in the I/O interface. The circuitry has (1) an analog front end that is arranged to detect power supply oscillations relative to a grounded terminal, (2) an amplifier (or logic conversion circuit) that is arranged to convert an output signal from the analog front end to a digital signal, and (3) a shunting apparatus arranged to modify power supply behavior in the I/O interface dependent on the digital signal.
1. A computer system having an I/O interface, comprising:
a supply voltage line operatively connected to the I/O interface;
a ground voltage line operatively connected to the I/O interface; and
a passband shunt regulator operatively connected to the supply voltage line and the ground voltage line, wherein the passband shunt regulator is connected in parallel with a capacitance disposed across the supply voltage line and the ground voltage line.
2. The computer system of claim 1 , wherein the passband shunt regulator is arranged to short the supply voltage line and the ground voltage line dependent on a voltage in the I/O interface overshooting in response to a resonance condition of the I/O interface.
3. The computer system of claim 1 , the passband shunt regulator comprising at least one transistor operatively connected to the supply voltage line and the ground voltage line.
4. The computer system of claim 1 , further comprising:
another passband shunt regulator operatively connected to the supply voltage line and the ground voltage line, wherein the another passband shunt regulator is connected in parallel with the capacitance.
5. An I/O interface having a power supply terminal and a ground terminal, comprising:
an analog stage arranged to output an analog signal dependent on power supply oscillations in the I/O interface;
an amplifier stage arranged to output a digital signal dependent on the analog signal; and
a shunting stage operatively connected to the amplifier stage and arranged to short the power supply terminal and the ground terminal dependent on the digital signal.
6. The I/O interface of claim 5 , the analog stage comprising:
a bias generator arranged to output the analog signal dependent on an average voltage potential of the I/O interface.
7. The I/O interface of claim 6 , wherein the bias generator is arranged to input the digital signal.
8. The I/O interface of claim 5 , the amplifier stage comprising:
a comparator operatively connected to the power supply terminal and the ground terminal and arranged to output the digital signal dependent on an instantaneous voltage potential of the I/O interface.
9. The I/O interface of claim 5 , the shunting stage comprising:
at least one transistor arranged to input the digital signal, wherein the at least one transistor is operatively connected between the power supply terminal and the ground terminal.
10. An apparatus for regulating resonance in an I/O interface, comprising:
means for providing a power supply voltage;
means for providing a ground voltage; and
means for resistively shorting the means for providing the power supply voltage and the means for providing the ground voltage at a particular resonant frequency of the I/O interface.
11. The apparatus of claim 10 , further comprising:
means for outputting an analog signal dependent on an average voltage potential of the I/O interface; and
means for outputting a digital signal dependent on an instantaneous voltage potential of the I/O interface,
wherein the means for resistively shorting is dependent on the digital signal.
12. A method for regulating power supply oscillations in an I/O interface, comprising:
supplying a power supply voltage to the I/O interface;
supplying a ground voltage to the I/O interface;
tracking an average voltage potential of the I/O interface;
tracking an instantaneous voltage potential of the I/O interface; and
shorting the power supply voltage and the ground voltage dependent on the average voltage potential and the instantaneous voltage potential.
13. The method of claim 12 , further comprising:
outputting a first signal dependent on the average voltage potential of the I/O interface; and
outputting a second signal dependent on the instantaneous voltage potential of the I/O interface,
wherein the shorting is dependent on the second signal.
14. The method of claim 13 , wherein outputting the first signal is dependent on the second signal.
15. The method of claim 13 , wherein outputting the second signal is dependent on the first signal.