Patent Assignment
Reel/Frame 037278/0842
Merger and Change of Name
Recorded: 2015-12-12
Pages: 11
Assignors
ORACLE USA, INC.
Executed: 2010-02-12
SUN MICROSYSTEMS, INC.
Executed: 2010-02-12
ORACLE AMERICA, INC.
Executed: 2010-02-12
Assignee
ORACLE AMERICA, INC.
500 ORACLE PARKWAY, REDWOOD SHORES, CALIFORNIA, 94065
Covered Properties
(100)
Focus Traversal Mechanism for Graphical User Interface Widgets
Patent:
6,892,360 →
Application:
09/129,380 →
Remote Device Access Over a Network
Patent:
6,895,588 →
Application:
09/289,789 →
Single Sign-on Framework with Trust-Level Mapping to Authentication Requirements
Patent:
6,892,307 →
Application:
09/368,507 →
Method and Apparatus for Sending Encrypted Electronic Mail Through a Distribution List Exploder
Patent:
6,912,656 →
Application:
09/451,504 →
Availability, Reliability or Maintainability Index Including Outage Characterization
Patent:
6,901,347 →
Application:
09/510,938 →
Method and Apparatus for Improving Utilization of a Resource on a Shared Client
Patent:
6,912,578 →
Application:
09/513,652 →
Method and System for Establishing Trust in Downloaded Proxy Code
Patent:
6,901,518 →
Application:
09/543,908 →
Automatically Configuring a Server into a Master or Slave Server Based on Its Relative Position in a Server Network
Patent:
6,889,248 →
Application:
09/547,699 →
Method and Apparatus for Implementing Deployment Descriptors in an Enterprise Environment
Patent:
6,892,382 →
Application:
09/564,067 →
System and Method for Time Multiplexing of Multi-Domain Transactions
Patent:
6,901,056 →
Application:
09/569,988 →
Mechanism for Evaluating Requests Prior to Disposition in a Multi-Threaded Environment
Patent:
6,895,584 →
Application:
09/573,696 →
Database Access Bridge System and Process
Patent:
6,889,227 →
Application:
09/621,687 →
Adding Secure External Virtual Memory to Smart Cards
Patent:
6,889,329 →
Application:
09/627,845 →
Method and Apparatus for Invalidation of Data in Computer Systems
Patent:
6,910,107 →
Application:
09/644,089 →
System and Method for Hot Swapping Daughtercards in High Availability Computer Systems
Patent:
6,892,263 →
Application:
09/680,244 →
Client-Specified Display Services in a Distributed Computing Environment
Patent:
6,898,618 →
Application:
09/693,297 →
Frameworks for Invoking Methods in Virtual Machines
Patent:
6,901,591 →
Application:
09/703,361 →
Safe Language Static Variables Initialization in a Multitasking System
Patent:
6,901,586 →
Application:
09/707,578 →
Javascript Interpreter Engine Written in Java
Patent:
6,898,786 →
Application:
09/714,049 →
Automatic Selection of Unique Node Identifiers in a Distributed Routing Environment
Dynamic Lan Boundaries
Autoconfiguring Ip Routers
System and Method for Dynamically Disabling Resubmission of Http Requests
Patent:
6,898,619 →
Application:
09/731,782 →
Method and Apparatus for Desirable Network Components
Search Engine Interface and Method of Controlling Client Searches
Recovering Added Precision from L-Bit Samples by Dithering the Samples Prior to an Averaging Computation
Method, System, Program, and Data Structures for Testing a Network System Including Input/Output Devices
Processing Architecture Having an Array Bounds Check Capability
Method and Apparatus for Verifying Consistency Between a First Address Repeater and a Second Address Repeater
Clean Thread Termination
Method and Apparatus for Migration of Managed Application State for a Java Based Application
Patent:
6,912,569 →
Application:
09/846,492 →
Fault-Tolerant, Self-Healing Routing Scheme for a Multi-Path Interconnection Fabric in a Storage Network
Methods and Apparatus for Use in Aiding Stack Unwinding
Method and Apparatus for Automatically Producing Efficient Code for Computing Derivatives
Method and Apparatus to Facilitate Debugging a Platform-Independent Virtual Machine
System and Method for Providing a Persistent Object Framework for Managing Persistent Objects
System Domain Targeted, Configurable Interconnection
Circuit Reduction Technique for Improving Clock Net Analysis Performance
Utilizing Slow Asic Logic Bist to Preserve Timing Integrity Across Timing Domains
Apparatus and Method for Configuring an External Device
Validation Technique for Bulk Lock Delegation
Automatic System Control Failover
Power Modeling Methodology for a Pipelined Processor
Method and System for Automated Web Reports
Method and Apparatus for Facilitating Validation of Data Retrieved from Disk
Expansion Card Cage Stabilizer
Threshold-Based Load Address Prediction and New Thread Identification in a Multithreaded Microprocessor
Fault Tolerance Mechanism for a Storage Device That Stores Data in Stacks Within an Integral Storage Medium
Scanable R-S Glitch Latch for Dynamic Circuits
Integrated Temperature Sensor
Multiple Scan Line Sample Filtering
Opcode to Turn Around a Bi-Directional Bus
Method and Apparatus for Efficiently Implementing a Last-in First-Out Buffer
Multipurpose Memory System for Use in a Graphics System
Method for Rasterizing Graphics for Optimal Tiling Performance
Hideable Accessory Platform
Enhanced Memory Management for Portable Devices
Methods and Systems for Eliminating Data Redundancies
Maximal Tile Generation Technique and Associated Methods for Designing and Manufacturing Vlsi Circuits
Optimistic Transaction Compiler
System and Method for Dynamically Tuning Interrupt Coalescing Parameters
N-Way Set-Associative External Cache with Standard Ddr Memory Devices
Cascode Stage Input/Output Device
Method and Apparatus for Providing Multiple-Version Support for Highly Available Objects
Patent:
6,892,320 →
Application:
10/160,509 →
Support Module Ejection Mechanism
Distributed Graphitic Foam Heat Exchanger System
Method and Apparatus for Performing Operation on Physical Design Data
Computer Storage Systems
Mechanism for Enabling Efficient Execution of an Instruction
Altering Virtual Machine Execution Parameters at Runtime
Method and System for Selecting Training Materials
Correction of Width Violations of Dummy Geometries
Adaptive Keeper Sizing for Dynamic Circuits Based on Fused Process Corner Data
Process Monitor Based Keeper Scheme for Dynamic Circuits
Method and Apparatus for Atomically Changing Selected Bits Within a Register
Exterior Front Panel Assembly for Accommodating and Strengthening a Computer Card Assembly
Correction of Spacing Violations Between Pure Fill via Areas in a Multi-Wide Object Class Design Layout
Shared Memory Multiprocessor Memory Model Verification System and Method
Method and Apparatus for Integration of Communication Links with a Remote Direct Memory Access Protocol
On-Chip Pll Locked Frequency Determination Method and System
Automatically Identifying Replacement Times for Limited Lifetime Components
Measuring the Exact Memory Requirement of an Application Through Intensive Use of Garbage Collector
System and Method for Synchronizing Access to Shared Resources
Multipoint Plane Measurement Probe and Methods of Characterization and Manufacturing Using Same
Balanced Flow Cooling
I/O Interface Anti-Resonance Passband Shunting Technique
Patching Technique for Correction of Minimum Area and Jog Design Rule Violations
Method and Circuitry for Phase Align Detection in Multi-Clock Domain
Method and Device for Linking Work Requests with Completion Queue Entries
Method to Partition Large Code Across Multiple E-Caches
Electrical Connector for Conveying Signals Between Two Circuit Boards
Method and System for Storing Field Replaceable Unit Operational History Information
Virtual Host Controller Interface with Multipath Input/Output
System for Optimizing Buffers in Integrated Circuit Design Timing Fixes
Sorber Structure for Electro-Desorption Compressor
Patent:
6,895,780 →
Application:
10/611,190 →
Clock Skew Tolerant Clocking Scheme
Emi Seal for System Chassis
Patent:
6,909,043 →
Application:
10/706,203 →
High Speed Single Ended Sense Amplifier with Built-in Multiplexer
Thermal Control Apparatus for Electronic Systems
Patent:
6,892,801 →
Application:
10/757,930 →
Self-Cooled Electronic Equipment Enclosure with Failure Tolerant Cooling System and Method of Operation
Patent:
6,896,612 →
Application:
10/764,848 →