Multiple die stack package
View Patent ↗A semiconductor package, containing two or more stacked IC devices attached to a substrate. Each of the IC devices has a plurality of electrical contact regions which are connected to the substrate by means of electrical connections.
1. A semiconductor package comprising:
a first IC device;
a second IC device;
a substrate, the first IC device being attached to the substrate and the second IC device being attached to the first IC device;
a first electrical connection between the first IC device and the substrate;
a second electrical connection between the second IC device and the substrate;
an electrical contact distributor, attached to one of the first or second IC devices in the semiconductor package;
wherein an electrical connection is connected to an associated electrical contact region with the electrical contact distributor; and
wherein the electrical contact distributor comprises at least one of a wafer distribution layer; a substrate interposer; a dielectric interposer; and a metallic interposer;
an opening, through the substrate, from a first side of the substrate to which the first IC device is attached, to a second side of the substrate opposite the first side; and
an electrical contact region on the first IC device,
wherein said first electrical connection passes through said opening and connects said electrical contact region on the first IC device to the second side of the substrate; and
wherein said electrical contact region on the first IC device includes a row of electrical contact regions on the first IC device, said row located substantially centrally on a first side of the first IC device, to which the substrate is attached.
2. The semiconductor package according to claim 1 , wherein the substrate is attached to a first major face of the first IC device and the second IC device is attached to a second major face of the first IC device.
3. A semiconductor package according to claim 1 , wherein said electrical contact region on the first IC device is part of a first row of electrical contact regions on the first IC device; and the semiconductor package further comprises: a second opening through the substrate from the first side to the second side; a second row of electrical contact regions on the first IC device; and a third electrical connection, passing through said second opening and connecting an electrical contact region in said second row of electrical contact regions on the first IC device to the second side of the substrate.
4. A semiconductor package according to claim 3 , wherein said first and second rows of electrical contact regions on the first IC device are located on mutually opposite edges of a first side of the first IC device, to which the substrate is attached.
5. The semiconductor package according to claim 1 , further comprising an electrical contact region on the second IC device and said second electrical connection connects the electrical contact region on the second IC device to the substrate.
6. The semiconductor package according to claim 5 , wherein said electrical contact region on the second IC device includes a first row of electrical contact regions on the second IC device; and the semiconductor package further comprises a second row of electrical contact regions on the second IC device and a third electrical connection that connects an electrical contact region in the second row of electrical contact regions on the second IC device to the substrate.
7. The semiconductor package according to claim 6 , wherein said first and second rows of electrical contact regions on the second IC device are located on mutually opposite edges of a first side of the second IC device, which is on the other side of the second IC device to a second side, to which the first IC device is attached.
8. A semiconductor package according to claim 1 , wherein said first electrical contact region on the second IC device is part of a row of electrical contact regions on the second IC device, said row located substantially centrally on a first side of the second IC device, which is on the other side of the second IC device to a second side, to which the first IC device is attached.
9. The semiconductor package according to claim 1 , further comprising:
at least a third IC device, the third IC device attached to the second IC device with a spacer; and
at least one electrical connection that connects an electrical contact region on each of the IC devices to the substrate.
10. The semiconductor package according to claim 1 , wherein the first IC device performs a different function than the second IC device.