Method for optimizing high frequency performance of via structures
View Patent ↗A method for enhancing the high frequency signal integrity performance of a printed circuit board (PCB) or backplane is provided. According to one embodiment of the present invention, the method involves the use of S-parameters as the primary cost factors associated with an iterative process to optimize the physical dimensions and shape of a single or a collection of vias within the PCB or backplane. In certain embodiments, the process involves the representation of the via components as equivalent lumped series admittances and impedances, as well as, RLGC sub-circuits upon which basic circuit analysis is performed to optimize secondary characteristics, for example, the maximization of the sub-circuit's resistance and/or the minimization of the sub-circuit's capacitance. The iterative process involves the alteration of physical dimensions and the shape of the via components such that the secondary characteristics are optimized.
1. A method for optimizing the high frequency performance of at least one via structure having at least one stub, comprising the steps of:
a) defining a plurality of top level parameters for optimization;
b) deriving a plurality of second level parameters for optimization and that are monotonic with respect to said top level parameters;
c) defining economic cost constraints for optimization of said second level parameters;
d) subdividing said at least one via structure into one of several types of transmission line segments;
e) minimizing stub section lengths of said at least one via structure;
f) converting said several types of transmission line segments into equivalent series impedances, and shunt admittances for use as said second level parameters; and
g) optimizing said second level parameters.
2. The method of claim 1 , wherein said top level parameters are the S-parameters of said at least one via structure.
3. The method of claim 1 , wherein said several types of transmission line segments include transmission line bend sections, non-uniform transmission line thru sections, and loaded non-uniform transmission line stub sections, as necessary, to generate an electrical circuit equivalent to said at least one via structure.
4. The method of claim 3 , wherein said transmission line bend sections are converted into lumped element series impedances and shunt element admittances.
5. The method of claim 4 , wherein said non-uniform transmission line thru sections are converted into a series of discretized RLGC sub-circuits.
6. The method of claim 5 , wherein said loaded non-uniform transmission line stub sections are converted into a series of discretized RLGC sub-circuits.
7. The method of claim 1 , wherein said optimization of said second level parameters includes minimizing the value of the series impedances and shunt admittances of said transmission line bend sections.
8. The method of claim 1 , wherein said optimization of said second level parameters involves the manipulation of the physical dimensions of said at least one via structure.
9. A method for optimizing the high frequency performance of at least one via structure, comprising the steps of:
a) defining a plurality of top level parameters for optimization;
b) deriving a plurality of second level parameters for optimization and that are monotonic with respect to said top level parameters;
c) defining economic cost constraints for optimization of said second level parameters;
d) subdividing said at least one via structure into one of several types of transmission line segments;
e) minimizing stub section lengths of said at least one via structure;
f) converting said several types of transmission line segments into equivalent series impedances, and shunt admittances; and
g) optimizing said second level parameters;
wherein said several types of transmission line segments include transmission line bend sections, non-uniform transmission line thru sections, and loaded non-uniform transmission line stub sections, as necessary, to generate said equivalent series impedances and said shunt admittances;
wherein said second level parameters are the values of equivalent lumped element series impedances and shunt;
wherein said optimization of said second level parameters includes making said equivalent series impedances between adjacent sub-circuits as equal as possible, and making said equivalent shunt admittances between adjacent sub-circuits as equal as possible, and if any one of said equivalent series impedances and shunt admittances between adjacent sub-circuits cannot be made as equal as possible, then making a product of said series equivalent impedances and shunt admittances between adjacent sub-circuits as equal as possible.
10. A method for optimizing the high frequency performance of at least one via structure, comprising the steps of:
a) defining a plurality of top level parameters for optimization;
b) deriving a plurality of second level parameters for optimization and that are monotonic with respect to said top level parameters;
c) defining economic cost constraints for optimization of said second level parameters;
d) subdividing said at least one via structure into one of several types of transmission line segments;
e) minimizing stub section lengths of said at least one via structure;
f) converting said several types of transmission line segments into equivalent series impedances, and shunt admittances; and
g) optimizing said second level parameters;
wherein said several types of transmission line segments include transmission line bend sections, non-uniform transmission line thru sections, and transmission line stub sections, as necessary, to generate said equivalent series impedances and said shunt admittances;
wherein said second level parameters are the values of equivalent lumped element series impedances and shunt admittances.