Methods and circuits for optimal equalization
View Patent ↗Methods and circuits utilizing a two stage adaptation algorithm to determine the optimal code for an equalizer to compensate a received signal is disclosed. In the first stage, a coarse tuning algorithm is used to choose a range of codes based on the amplitude of the received signal. The chosen codes will be used as reference points in the second stage. In the second stage, a fine tuning algorithm is used to select a code in the range of reference codes determined in stage one. The fine tuning algorithm looks to the status of the data lock signal generated by the clock recovery circuit. If the data lock signal does not indicate a lock, the fine tuning algorithm cycles through the range of reference codes. If the data lock signal indicates a lock, then that particular code is continued to be used for the equalizer.
1. A method of adjusting an equalizer, said method comprising the steps of:
defining a range of values based on an amplitude of a received signal, thereby providing a defined range of values;
generating a code within said defined range of values; and
adjusting said equalizer using the generated code.
2. A method as recited in claim 1 , wherein said generating step comprises generating an upper limit value and a lower limit value as a function of an equalized signal received from said equalizer.
3. A method as recited in claim 2 , wherein said step of generating said upper limit value is generated as a function of the upper range of said equalized signal.
4. A method as recited in claim 2 , wherein said step of generating said lower limit value is generated as a function of the lower range of said equalized signal.
5. A method as recited in claim 3 , wherein said step of generating said upper limit value is generated as a function of a pre-defined upper limit reference signal.
6. A method as recited in claim 4 , wherein said step of generating said lower limit value is generated as a function of a pre-defined lower limit reference signal.
7. A method as recited in claim 1 , wherein said generating step comprises generating said code by selecting a value in the range between an upper limit value and an lower limit value.
8. A method as recited in claim 7 , wherein said step of selecting said code comprises selecting said code by cycling through the values between said lower limit value and said upper limit value.
9. A method as recited in claim 1 , further comprising receiving a data lock signal and, if said data lock signal does not indicate data lock, generating said code by cycling through the values between said lower limit value and said upper limit value.
10. A method as recited in claim 7 , wherein said step of selecting said code comprises selecting said code by cycling up and down between said lower limit value and said upper limit value as a function of an error value.
11. A method as recited in claim 10 , wherein said error value is generated from the difference between a pre-defined reference signal and said code.
12. A method of adjusting an equalizer, said method comprising the steps of:
generating an upper range value and a lower range value from an equalized signal generated by the equalizer based on an amplitude of a received signal;
generating a code within a range of values, said code being selected by cycling through said range of values defined by said upper range value and said lower range value; and
adjusting the equalizer based on said code.
13. A method as recited in claim 12 , further comprising receiving a data lock signal, and if said data lock signal does not indicate a data lock condition, performing said generating and said code step.
14. A method as recited in claim 12 , wherein said generating said code step comprises selecting said code by cycling up and down between said lower range value and said upper range value as a function of an error value.
15. A method as recited in claim 14 , wherein said error value is generated from the difference between a pre-defined reference signal and said code.
16. A method of receiving a signal, comprising:
receiving an input signal and a code by an equalizer;
generating an equalized signal, based on said input signal and the code;
receiving said equalized signal by a slicer;
generating a sliced signal;
receiving said sliced signal by a clock recovery subcircuit;
generating an output signal and a data lock signal based on said sliced signal;
generating an upper range value and a lower range value from said equalized signal, thereby providing a generated upper range value and a generated lower range value; and
generating said code within a range of values defined by said generated upper range value and said generated lower range value;
wherein said code indicates an adjustment to said input signal in generating said equalized signal.
17. A method as recited in claim 16 , further comprising receiving said data lock signal and, if said data lock signal does not indicate a data lock condition, said step of generating said code comprises selecting said code by cycling within said range of values.
18. A method as recited in claim 17 , wherein said step of generating said code comprises selecting said code by cycling up and down between said lower range value and said upper range value as a function of an error value.
19. A method as recited in claim 18 , wherein said error value is generated from the difference between a pre-defined reference signal and said code.