Patent Assignment
Reel/Frame 047195/0658
MERGER
Recorded: 2018-10-04
Received: 2018-10-04
Pages: 28
Assignor
AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Executed: 2018-05-09
Assignee
AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
1 YISHUN AVENUE 7, SINGAPORE, SGX, 768923, SINGAPORE
Covered Applications
(100)
RANDOM ACCESS MEMORY (RAM) METHOD OF OPERATION AND DEVICE FOR SEARCH ENGINE SYSTEMS
App. No. 12/150,146
→
CONTENT ADDRESSABLE MEMORY CELL CONFIGURABLE BETWEEN MULTIPLE MODES AND METHOD THEREFOR
App. No. 12/006,972
→
SYNCHRONIZATION OF DATA LINKS IN A MULTIPLE LINK RECEIVER
App. No. 11/951,280
→
RADIO TRANSCEIVER COMMUNICATING IN A PLURALITY OF FREQUENCY BANDS
App. No. 11/947,531
→
METHOD AND APPARATUS FOR DIVERSITY COMBINING AND CO-CHANNEL INTERFERENCE SUPPRESSION
App. No. 11/875,446
→
ACTIVE LOAD WITH ADJUSTABLE COMMON-MODE LEVEL
App. No. 11/905,287
→
COMPACT AND HIGHLY EFFICIENT DRAM CELL
App. No. 11/860,898
→
MULTIPLE POWER MODE AMPLIFIER WITH BIAS MODULATION OPTION AND WITHOUT BYPASS SWITCHES
App. No. 11/857,923
→
MULTIPLE POWER MODE AMPLIFIER WITH BIAS MODULATION OPTION AND WITHOUT BYPASS SWITCHES
App. No. 11/857,997
→
DIGITALLY ADJUSTED VARIABLE GAIN AMPLIFIER (VGA) USING SWITCHABLE DIFFERENTIAL PAIRS
App. No. 11/857,553
→
MULTIPLE POWER MODE AMPLIFIER WITH BIAS MODULATION OPTION AND WITHOUT BYPASS SWITCHES
App. No. 11/857,603
→
MULTIPLE POWER MODE AMPLIFIER WITH BIAS MODULATION OPTION AND WITHOUT BYPASS SWITCHES
App. No. 11/857,966
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TRANSCEIVER FOR BIDIRECTIONAL FREQUENCY DIVISION MULTIPLEXED TRANSMISSION
App. No. 11/857,255
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APPARATUS AND METHOD FOR BIASING CASCODE DEVICES IN A DIFFERENTIAL PAIR USING THE INPUT, OUTPUT, OR OTHER NODES IN THE CIRCUIT
App. No. 11/889,992
→
SYSTEM HAVING INTERFACES, SWITCH, AND MEMORY BRIDGE FOR CC-NUMA OPERATION
App. No. 11/891,954
→
PHY SUB-CHANNEL PROCESSING
App. No. 11/832,530
→
MULTIPLE STRING SEARCHING USING TERNARY CONTENT ADDRESSABLE MEMORY
App. No. 11/780,391
→
OPTICAL VIA TO PASS SIGNALS THROUGH A PRINTED CIRCUIT BOARD
App. No. 11/779,116
→
AXIS TRANSLATION INSTALLATION MECHANISM FOR OPTOELECTRONICS MODULES AND METHOD
App. No. 11/776,002
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INTEGRATED LASER-DIFFRACTIVE LENS DEVICE
App. No. 11/768,235
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APPARATUS AND METHOD FOR PHASE LOCK LOOP GAIN CONTROL
App. No. 11/767,899
→
SYSTEM AND METHOD FOR PERFORMING ON-CHIP SYNCHRONIZATION OF SYSTEM SIGNALS UTILIZING OFF-CHIP HARMONIC SIGNAL
App. No. 11/765,850
→
INTERFACE CIRCUIT FOR PROVIDING A COMPUTER LOGIC CIRCUIT WITH FIRST AND SECOND VOLTAGES AND AN ASSOCIATED METHOD
App. No. 11/810,722
→
SYSTEM AND METHOD FOR DC OFFSET COMPENSATION AND BIT SYNCHRONIZATION
App. No. 11/759,001
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ADAPTIVE RADIO TRANSCEIVER WITH FILTERING
App. No. 11/757,014
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DECODING LDPC (LOW DENSITY PARITY CHECK) CODE AND GRAPHS USING MULTIPLICATION (OR ADDITION IN LOG-DOMAIN) ON BOTH SIDES OF BIPARTITE GRAPH
App. No. 11/807,388
→
APPARATUS AND METHOD FOR PHASE LOCK GAIN CONTROL USING UNIT CURRENT SOURCES
App. No. 11/754,804
→
CONTENT ADDRESSABLE MEMORIES (CAM) HAVING LOW POWER DYNAMIC MATCH LINE SENSING CIRCUITS THEREIN
App. No. 11/751,900
→
OPTICAL ELEMENT AND SYSTEM USING THE SAME
App. No. 11/802,044
→
DOWNLOADING MAP SEGMENT(S) TO A CELL PHONE BASED UPON ITS GPS COORDINATES AND MOBILITY
App. No. 11/750,396
→
CLOCK SWITCH FOR GENERATION OF MULTI-FREQUENCY CLOCK SIGNAL
App. No. 11/748,510
→
TECHNIQUES FOR ENABLING A 10BT ACTIVE OUTPUT IMPEDANCE LINE DRIVER USING A LOW POWER SUPPLY
App. No. 11/798,294
→
SQUELCH DETECTION SYSTEM FOR HIGH SPEED DATA LINKS
App. No. 11/747,246
→
DIRECT CONVERSION RF TRANSCEIVER FOR WIRELESS COMMUNICATIONS
App. No. 11/743,143
→
WIRELESS DATA COMMUNICATIONS USING FIFO FOR SYNCHRONIZATION MEMORY
App. No. 11/796,837
→
METHOD AND SYSTEM FOR PROVIDING ACCELERATED VIDEO PROCESSING IN A COMMUNICATION DEVICE
App. No. 11/740,692
→
REDUCED COST AND COMPLEXITY MEDIA RECOGNITION SYSTEM WITH SPECULAR INTENSITY LIGHT DETECTOR
App. No. 11/789,555
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RFIC DIE AND PACKAGE
App. No. 11/784,878
→
ITERATIVE MULTI-STAGE DETECTION TECHNIQUE FOR A DIVERSITY RECEIVER HAVING MULTIPLE ANTENNA ELEMENTS
App. No. 11/695,384
→
ITERATIVE MULTI-STAGE DETECTION TECHNIQUE FOR A DIVERSITY RECEIVER HAVING MULTIPLE ANTENNA ELEMENTS
App. No. 11/695,325
→
ITERATIVE MULTI-STAGE DETECTION TECHNIQUE FOR A DIVERSITY RECEIVER HAVING MULTIPLE ANTENNA ELEMENTS
App. No. 11/695,375
→
ITERATIVE MULTI-STAGE DETECTION TECHNIQUE FOR A DIVERSITY RECEIVER HAVING MULTIPLE ANTENNA ELEMENTS
App. No. 11/695,394
→
COMPACT BALUN WITH REJECTION FILTER FOR 802.11A AND 802.11B SIMULTANEOUS OPERATION
App. No. 11/729,928
→
AUTOMATIC GAIN CONTROL WITH THREE STATES OF OPERATION
App. No. 11/729,587
→
LOCATION-BASED TRANSACTION AUTHENTICATION OF WIRELESS TERMINAL
App. No. 11/731,237
→
WIRELESS COMMUNICATION DEVICE HAVING GPS RECEIVER AND AN ON-CHIP GYRATOR
App. No. 11/731,238
→
GPS DEVICE AND INTEGRATED CIRCUIT WITH AN ON-CHIP GYRATOR
App. No. 11/731,256
→
PROCESSING SERVO DATA HAVING DC LEVEL SHIFTS
App. No. 11/728,862
→
GAIN BOOSTING FOR TUNED DIFFERENTIAL LC CIRCUITS
App. No. 11/690,932
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MULTI-PAIR GIGABIT ETHERNET TRANSCEIVER HAVING DECISION FEEDBACK EQUALIZER
App. No. 11/688,669
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SEMI-SUSPENDED COPLANAR WAVEGUIDE ON A PRINTED CIRCUIT BOARD
App. No. 11/714,729
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APPARATUS AND METHOD FOR OVER-VOLTAGE, UNDER-VOLTAGE AND OVER-CURRENT STRESS PROTECTION FOR TRANSCEIVER INPUT AND OUTPUT CIRCUITRY
App. No. 11/712,938
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OPEN LOOP LASER POWER CONTROL FOR OPTICAL NAVIGATION DEVICES AND OPTICAL SYSTEMS
App. No. 11/679,765
→
LATE FRAME RECOVERY METHOD
App. No. 11/674,442
→
P-CHANNEL POWER CHIP
App. No. 11/670,924
→
BANDWIDTH EFFICIENT CODED MODULATION SCHEME BASED ON MLC (MULTI-LEVEL CODE) SIGNALS HAVING MULTIPLE MAPS
App. No. 11/701,155
→
LDPC (LOW DENSITY PARITY CHECK) CODED MODULATION HYBRID DECODING
App. No. 11/701,156
→
MEMORY REDUNDANCE CIRCUIT TECHNIQUES
App. No. 11/669,400
→
TRANSCEIVER MODULE FOR OPTICAL COMMUNICATIONS AND METHOD FOR TRANSMITTING AND RECEIVING DATA
App. No. 11/669,247
→
IMPEDANCE MATCHED PASSIVE RADIO FREQUENCY TRANSMIT/RECEIVE SWITCH
App. No. 11/700,696
→
CONTENT ADDRESSABLE MEMORIES (CAMS) BASED ON A BINARY CAM AND HAVING AT LEAST THREE STATES
App. No. 11/619,889
→
METHOD AND APPARATUS FOR REDUCING LEAKAGE CURRENT IN A READ ONLY MEMORY DEVICE USING SHORTENED PRECHARGE PHASE
App. No. 11/619,344
→
LOW THRESHOLD VOLTAGE PMOS APPARATUS AND METHOD OF FABRICATING THE SAME
App. No. 11/648,651
→
SYNCHRONOUS POWER GAUGE
App. No. 11/649,149
→
METHOD AND APPARATUS FOR LOCATING POSITION OF A GPS DEVICE
App. No. 11/618,481
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EFFICIENT 8X8 CABAC RESIDUAL BLOCK TRANSCODE SYSTEM
App. No. 11/643,642
→
ANALOG DIGITAL CONVERTER (ADC) HAVING IMPROVED STABILITY AND SIGNAL TO NOISE RATIO (SNR)
App. No. 11/613,185
→
DAC MODULE AND APPLICATIONS THEREOF
App. No. 11/638,622
→
ANALOG TO DIGITAL CONVERTER WITH DYNAMIC POWER CONFIGURATION
App. No. 11/637,823
→
METHOD AND APPARATUS FOR SELECTIVELY DESKEWING DATA TRAVELING THROUGH A BUS
App. No. 11/637,001
→
EDGE INCREMENTAL REDUNDANCY SUPPORT IN A CELLULAR WIRELESS TERMINAL
App. No. 11/636,032
→
METHOD, APPARATUS AND SYSTEM FOR HIGH-SPEED TRANSMISSION ON FIBER OPTIC CHANNEL
App. No. 11/567,972
→
DUAL-MODE, DUAL-LOAD HIGH EFFICIENCY RF POWER AMPLIFIER
App. No. 11/634,060
→
SYSTEM AND METHOD FOR COMMON MODE CALIBRATION IN AN ANALOG TO DIGITAL CONVERTER
App. No. 11/633,544
→
METHOD AND SYSTEM FOR PROCESSING MULTI-RATE AUDIO FROM A PLURALITY OF AUDIO PROCESSING SOURCES
App. No. 11/565,414
→
LIGHT SOURCE HAVING MORE THAN THREE LEDS IN WHICH THE COLOR POINTS ARE MAINTAINED USING A THREE CHANNEL COLOR SENSOR
App. No. 11/565,540
→
PULSE-ON-EDGE CIRCUIT
App. No. 11/563,758
→
TUNEABLE FILTERS USING OPERATIONAL AMPLIFIERS
App. No. 11/604,194
→
COMPACT LED WITH A SELF-FORMED ENCAPSULATING DOME
App. No. 11/606,267
→
MULTI-CHANNEL SERDES RECEIVER FOR CHIP-TO-CHIP AND BACKPLANE INTERCONNECTS AND METHOD OF OPERATION THEREOF
App. No. 11/561,355
→
METHOD AND SYSTEM FOR FAST DATA ACCESS USING A MEMORY ARRAY
App. No. 11/598,010
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CODING ELEMENT WITH INTEGRATED LIMIT SWITCH
App. No. 11/595,046
→
METHOD TO IMPROVE CMFB PHASE MARGIN OF VARIABLE-OUTPUT-BANDWIDTH MIXER
App. No. 11/557,657
→
LOW POWER CONTENT ADDRESSABLE MEMORY
App. No. 11/557,098
→
SCALAR RESULT PRODUCING METHOD IN VECTOR/SCALAR SYSTEM BY VECTOR UNIT FROM VECTOR RESULTS ACCORDING TO MODIFIER IN VECTOR INSTRUCTION
App. No. 11/556,937
→
MULTIPLE POWER MODE AMPLIFIER WITH BIAS MODULATION OPTION AND WITHOUT BYPASS SWITCHES
App. No. 11/594,050
→
ITERATIVE DATA-AIDED CARRIER FREQUENCY OFFSET ESTIMATION FOR CODE DIVISION MULTIPLE ACCESS SYSTEMS
App. No. 11/592,286
→
ANTENNA ARRAY INCLUDING VIRTUAL ANTENNA ELEMENTS
App. No. 11/555,994
→
UNIVERSAL SINGLE-ENDED PARALLEL BUS
App. No. 11/591,406
→
POWER AMPLIFICATION APPARATUS OF A PORTABLE TERMINAL
App. No. 11/590,311
→
MODIFIED BRANCH METRICS FOR PROCESSING SOFT DECISIONS TO ACCOUNT FOR PHASE NOISE IMPACT ON CLUSTER VARIANCE
App. No. 11/590,387
→
VOLTAGE SUPPLY INSENSITIVE BIAS CIRCUITS
App. No. 11/590,674
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CHARACTERIZING CHANNEL RESPONSE IN A SINGLE UPSTREAM BURST USING REDUNDANT INFORMATION FROM TRAINING TONES
App. No. 11/590,388
→
METHOD FOR PROCESSING MULTIPLE WIRELESS COMMUNICATIONS SECURITY POLICIES
App. No. 11/589,919
→
SYSTEM FOR PROCESSING MULTIPLE WIRELESS COMMUNICATIONS SECURITY POLICIES
App. No. 11/589,920
→
HIGH DYNAMIC RANGE OPTICAL RECEIVER
App. No. 11/591,760
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CIRCUIT WITH Q-ENHANCEMENT CELL HAVING FEEDBACK LOOP
App. No. 11/590,452
→
WIRELESS NETWORK CARD WITH ANTENNA SELECTION OPTION
App. No. 11/554,501
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LOW-COMPLEXITY SAMPLING RATE CONVERSION METHOD AND APPARATUS FOR AUDIO PROCESSING
App. No. 11/586,669
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CONTENT ADDRESSABLE MEMORY (CAM) DEVICES HAVING NAND-TYPE COMPARE CIRCUITS
App. No. 11/553,202
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