Semiconductor device saving data in non-volatile manner during standby
View Patent ↗A power control unit activates a control signal ST for a circuit block to be set to a standby state before turning off power of the circuit block or a whole chip, and saves an operation result of data processing of the circuit block into a memory unit. When the power is again supplied to the circuit block in the standby state, the power control unit activates a control signal RES after the power supply is started and restores the data saved in the memory unit to the circuit block. Flip-flops in the circuit block are connected in series when the saving or restoring of data is performed, and perform a data transfer operation with a path different from that in a normal operation. Therefore, a semiconductor device can be provided which can rapidly transit to a standby mode having reduced current consumption while holding internal information.
1. A semiconductor device having first and second modes as operation modes, comprising:
a memory unit storing data in a non-volatile manner; and
a logic circuit unit transmitting data to said memory unit using first and second data transfer paths respectively in said first and second modes, wherein
in response to a notice signal to change a power supply potential fed to said memory unit and said logic circuit unit from a standard operation potential to a standby potential, said logic circuit unit saves result information processed in said first mode into said memory unit using said second data transfer path in said second mode.
2. The semiconductor device according to claim 1 , wherein
said standby potential is a potential set to be lower than said standard operation potential to reduce power consumption, and
said logic circuit unit includes
a plurality of flip-flop circuits holding a result of processing in said first mode in a volatile manner.
3. The semiconductor device according to claim 2 , wherein
when said power supply potential is reset from said standby potential to said standard operation potential, said logic circuit unit reads data from said memory unit and sets the data in said plurality of flip-flop circuits using said second data transfer path.
4. The semiconductor device according to claim 1 , wherein
said logic circuit unit includes
a plurality of holding circuits holding a result of processing in said first mode in a volatile manner,
said plurality of holding circuits are connected in series on said second data transfer path, and
held data of said plurality of holding circuits are serially transferred to said memory unit using said second data transfer path.