Semiconductor memory device and method for manufacturing the device
View Patent ↗A semiconductor memory device includes a semiconductor substrate and a support layer provided above the semiconductor substrate. Particles are formed on the support layer. A first electrode is provided on the support layer such that it covers the particles. The first electrode has a first interface located opposite to the particles and being wavy in accordance with the pattern of the particles. A capacitor insulation film is provided on the first interface. The capacitor insulation film has a second interface located opposite to the first interface and being wavy in accordance with the shape of the first interface. A second electrode is provided on the capacitor insulation film.
1. A semiconductor memory device having a capacitor structure, comprising:
a semiconductor substrate;
a support layer provided above the semiconductor substrate;
a plurality of particles formed on the support layer;
a first electrode provided on the support layer and covering the particles, the first electrode having a first interface opposite to the particles, the first interface being wavy in accordance with a pattern of the particles;
a capacitor insulation film provided on the first interface, the capacitor insulation film having a second interface located opposite to the first interface, the second interface being wavy in accordance with a shape of the first interface; and
a second electrode provided on the capacitor insulation film.
2. The semiconductor memory device according to claim 1 , further comprising:
a gate electrode provided on the semiconductor substrate with a gate insulation film interposed therebetween;
a source diffusion layer and a drain diffusion layer provided in a surface portion of the semiconductor substrate to sandwich the gate electrode; and
a conductive layer provided in the support layer and electrically connecting the first electrode to one of the source diffusion layer and the drain diffusion layer.
3. The semiconductor memory device according to claim 1 , wherein the support layer is an interlayer insulation film.
4. The semiconductor memory device according to claim 1 , wherein the support layer is a conductive layer provided in an interlayer insulation film which is provided above the semiconductor substrate.
5. The semiconductor memory device according to claim 1 , wherein the particles are substantially formed of a material selected from the group consisting of silicon and silicon nitride.
6. The semiconductor memory device according to claim 5 , wherein the semiconductor substrate has a major surface, the support layer has a trench, and a side wall defining the trench forms an angle to the major surface.
7. The semiconductor memory device according to claim 6 , wherein the particles are provided on the side wall of the trench of the support layer.
8. The semiconductor memory device according to claim 1 , wherein the semiconductor substrate has a major surface; the first electrode has a first portion located on the support layer and a second portion extending at an angle to the major surface; the first interface extending from the first portion to the second portion; the capacitor insulation film is provided on the first portion and the second portion; and the second electrode is provided on the capacitor insulation film which is provided on the first portion and the second portion.
9. The semiconductor memory device according to claim 8 , wherein the second portion, part of the capacitor insulation film located on the second portion, and part of the second electrode located on the part of the capacitor insulation film on the second portion are cylindrical.
10. The semiconductor memory device according to claim 1 , wherein the first electrode and second electrode are substantially formed of a material selected from the group consisting of a platinum group material and titanium nitride, and the capacitor insulation film is substantially formed of a high dielectric material.
11. The semiconductor memory device according to claim 1 , wherein the first electrode has a thickness greater than a curvature radius of the particles.
12. The semiconductor memory device according to claim 1 , wherein the second electrode has a third interface opposite to the second interface, the third interface being wavy in accordance with a shape of the second interface.