IP Library Granted Patent US 6,879,041
Granted Patent B2
US 6,879,041 · App. 10/396,326 · Granted Apr 12, 2005

Semiconductor device with joint structure having lead-free solder layer over nickel layer

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Quick Facts
Patent No.
US 6,879,041
App. No.
10/396,326
Granted
Apr 12, 2005
Kind
B2
Abstract

The impact strength resistance of a solder joint portion of a semiconductor device is improved. The semiconductor device has a joint structure wherein a jointing layer which does not contain sulfur substantially is arranged between an underlying conductive layer and a lead-free solder layer and further between the jointing layer and the lead-free solder layer is formed an alloy layer comprising elements of these layers.

Claims (13)

1. A semiconductor device comprising a joint structure having a copper underlying conductive layer, a nickel jointing layer formed on the copper underlying conductive layer, a Pb-free solder layer formed over the nickel jointing layer, and a tin-based alloy layer comprising elements of these layers formed between the nickel jointing layer and the Pb-free solder layer;

wherein sulfur concentration in the nickel jointing layer is less than 1% as the ratio of the sulfur ion number to the ion count number of the jointing layer in secondary ion mass spectrometry so that an impact bending strain exceeds 2000 ppm.

2. The semiconductor device according to claim 1 , wherein the nickel jointing layer is a plating layer made mainly of nickel and phosphorus.

3. The semiconductor device according to claim 1 , wherein the Pb-free solder layer is a bump.

4. The semiconductor device according to claim 1 ,

wherein the copper underlying conductive layer is an electrode pad of a wiring board,

wherein the nickel jointing layer is a plating layer formed on the surface of the electrode pad, and

wherein the Pb-free solder layer is a bump jointed to the jointing layer.

5. The semiconductor device according to claim 1 ,

further comprising a wiring board in which an electrode pad is formed on its rear face opposite to its main face, and a semiconductor chip mounted on the main face of the wiring board,

wherein the copper underlying conductive layer is an electrode pad of the wiring board,

wherein the nickel jointing layer is a plating layer formed on the surface of the electrode pad, and

wherein the Pb-free solder layer is a bump jointed to the jointing layer.

Assignments (6)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2014
From: HITACHI ULSI SYSTEMS CO., LTD.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 032859/0252 →
CHANGE OF NAME Recorded Aug 13, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024864/0635 →
MERGER Recorded Aug 13, 2010
From: RENESAS TECHNOLOGY CORP.
To: NEC ELECTRONICS CORPORATION
Reel/Frame 024879/0190 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2003
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORPORATION
Reel/Frame 014190/0088 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 26, 2003
From: YAMAMOTO, KENICHI; MORITA, TOSHIAKI; YAMADA, MUNEHIRO; KIMOTO, RYOSUKE
To: HITACHI, LTD.
Reel/Frame 013915/0449 →