Epitaxially coated semiconductor wafer and process for producing it
View Patent ↗A semiconductor wafer with a front surface and a back surface and an epitaxial layer of semiconducting material deposited on the front surface. In the semiconductor wafer, the epitaxial layer has a maximum local flatness value SFQR max of less than or equal to 0.13 μm and a maximum density of 0.14 scattered light centers per cm 2 . The front surface of the semiconductor wafer, prior to the deposition of the epitaxial layer, has a surface roughness of 0.05 to 0.29 nm RMS, measured by AFM on a 1 μm×1 μm reference area. Furthermore, there is a process for producing the semiconductor wafer. The process includes the following process steps: (a) as a single polishing step, simultaneous polishing of the front surface and of the back surface of the semiconductor wafer between rotating polishing plates while an alkaline polishing slurry is being supplied, the semiconductor wafer lying in a cutout of a carrier whose thickness is dimensioned to be 2 to 20 μm less than the thickness of the semiconductor wafer after the latter has been polished; (b) simultaneous treatment of the front surface and of the back surface of the semiconductor wafer between rotating polishing plates while a liquid containing at least one polyhydric alcohol having 2 to 6 carbon atoms is being supplied; (c) cleaning and drying of the semiconductor wafer; and (d) deposition of the epitaxial layer on the front surface of the semiconductor wafer produced in accordance with steps (a) to (c).
1. A process for producing a semiconductor wafer with a front surface and a back surface and an epitaxial layer of a semiconducting material deposited on the front surface, and
said process comprising the following process steps:
(a) as a single polishing step, simultaneous polishing of the front surface and of the back surface of the semiconductor wafer between rotating polishing plates while an alkaline polishing slurry is being supplied, the semiconductor wafer lying in a cutout of a carrier whose thickness is dimensioned to be 2 to 20 μm less than a thickness of the semiconductor wafer after the wafer has been polished;
(b) simultaneously treating of the front surface and the back surface of the semiconductor wafer between rotating polishing plates while a liquid containing at least one polyhydric alcohol having 2 to 6 carbon atoms is being supplied;
(c) cleaning and drying of the semiconductor wafer; and
(d) depositing the epitaxia layer on the front surface of the semiconductor wafer produced in accordance with steps (a) to (c).
2. The process as claimed in claim 1 ,
wherein the semiconductor wafer and the epitaxial layer are composed of silicon.
3. The process as claimed in claim 1 ,
wherein the alkaline polishing slurry supplied in step (a) essentially comprises a suspension of silicon dioxide particles and a base selected from the group consisting of an inorganic base, an organic base and mixtures thereof in water, which has a pH of 9 to 12 and is supplied continuously.
4. The process as claimed in claim 1 ,
wherein the liquid supplied in step (b) contains at least one polyhydric alcohol selected from the group consisting of ethylene glycol, glycerol, propylene glycol and butylene glycol.
5. The process as claimed in claim 4 ,
wherein the liquid supplied in step (b) further contains at least one substance selected from the group consisting of monohydric alcohols, surfactant, and mixtures thereof.
6. The process as claimed in claim 1 ,
wherein the epitaxial layer deposited in step (d) has a thickness of 0.3 μm to 10 μm and is deposited at a temperature of between 900° C. and 1250° C.
7. The process as claimed in claim 1 , further comprising
hydrophilizing the epitaxial layer deposited in step (d) with an oxidizing gas.
8. The process as claimed in claim 1 , further comprising hydrophilizing the epitaxial layer deposited in step (d) by wet-chemical means.
9. The process as claimed in claim 1 , comprising
producing the semiconductor wafer by sawing a semiconductor crystal and subjecting to a grinding step prior to polishing, one or both surfaces of the semiconductor wafer being ground.
10. The process as claimed in claim 9 , comprising
rounding an edge of the semiconductor wafer before or after the semiconductor wafer is ground.
11. The process as claimed in claim 1 , comprising
carrying out an etching step with material being removed from each of the two surfaces of the wafer before the semiconductor wafer is polished.