Flexible lead surface-mount semiconductor package
View Patent ↗A diode chip is mounted on two bottom metal leads of a surface-mount package through two flexible links. The links are zigzag cantilevers attached to the metallic plates. The cantilevers serve as springs to support the device and to cushion any temperature stress or bending stress so as not to damage the connection between the device and the metallic leads.
1. A surface mount semiconductor device package, comprising:
a semiconductor device; and
a first metallic plate comprising opposite inner and outer ends, and a flat curve cantilever bridging the two ends to cushion stress between the two ends;
protection glue covering at least the semiconductor device and the inner end of the metallic plate;
wherein
said semiconductor device is mounted on an upper surface of said inner end to be electrically coupled to said inner end;
said outer end has a lower surface opposite to the upper surface and adapted to be mounted on a substrate; and
wherein said cantilever comprises:
an inner zigzag portion connected to the inner end and covered by the protection glue, and
an outer zigzag portion connected to the outer end and positioned outside the protection glue.
2. A surface mount semiconductor device package as claimed in claim 1 , wherein said flat curve cantilever is a continuous shaped metal having a shape selected from the group consisting of U shape, V shape, and L shape.
3. A surface mount semiconductor device package as claimed in claim 1 , wherein said semiconductor device is a diode.
4. A surface mount semiconductor device package as described in claim 3 , wherein said diode has two bottom electrodes.
5. The surface mount semiconductor device as described in claim 3 , wherein said diode has a top electrode and a bottom electrode.
6. The surface mount semiconductor device as described in claim 5 , further comprising a second metallic plate; said bottom electrode rests on the first metallic plate, and said top electrode is wire-bonded to the second metallic plate.
7. The surface mount semiconductor device as described in claim 1 , wherein said inner end, cantilever, and outer end are coplanar.
8. The surface mount semiconductor device as described in claim 1 , further comprising:
a second metallic plate comprising opposite inner and outer ends, and a second flat curve cantilever bridging the two ends of the second metallic plate to cushion stress between the two ends of the second metallic plate;
wherein
said semiconductor device is further mounted on an upper surface of said inner end of the second metallic plate to be electrically coupled to said inner end of the second metallic plate and to span between the inner ends of the first and second metallic plates; and
said outer end of the second metallic plate has a lower surface opposite to the upper surface and adapted to be mounted on the substrate.
9. A surface mount semiconductor device package as claimed in claim 8 ,
wherein said second cantilever comprises:
an inner zigzag portion connected to the inner end of the second metallic plate and covered by the protection glue, and
an outer zigzag portion connected to the outer end of the second metallic plate and positioned outside the protection glue.
10. A surface mount semiconductor device package as claimed in claim 9 , wherein said semiconductor has two bottom electrodes each being electrically connected to one of the metallic plates.
11. A surface mount semiconductor device package as claimed in claim 9 , wherein
the outer end of each of the metallic plates, the lower surface of which is adapted to be directly mounted on the substrate, is spaced from the protection glue by the respective outer zigzag portion which is not adapted to be directly mounted on the substrate, and
the protection glue as well as the semiconductor device and the inner ends embedded therein are adapted to be supported over the substrate, without direct contact with the substrate, by spring action of the outer zigzag portions of the respective metallic plates.
12. A surface mount semiconductor device package as claimed in claim 1 , wherein
the outer end, the lower surface of which is adapted to be directly mounted on the substrate, is spaced from the protection glue by the outer zigzag portion which is not adapted to be directly mounted on the substrate, and
the protection glue as well as the semiconductor device and the inner end embedded therein are adapted to be supported over the substrate, without direct contact with the substrate, by spring action of at least the outer zigzag portion.
13. A surface mount semiconductor device package as claimed in claim 1 , further comprising
a second metallic plate comprising opposite inner and outer ends, and a second flat curve cantilever bridging the two ends of the second metallic plate to cushion stress between the two ends of the second metallic plate;
wherein
said semiconductor device has a top electrode wire-bonded to the inner end of the second metallic plate and a bottom electrode mounted on and electrically connected to the inner end of the first metallic plate;
the outer end of the second metallic plate has a lower surface opposite to the upper surface and adapted to be mounted on the substrate; and
the semiconductor device is entirely mounted on the inner end of the first metallic plate.
14. A surface mount semiconductor device package as claimed in claim 13 , wherein said second each said cantilever comprises:
an inner zigzag portion connected to the inner end of the second metallic plate and covered by the protection glue, and
an outer zigzag portion connected to the outer end of the second metallic plate and positioned outside the protection glue; and
the outer end of each of the metallic plates, the lower surface of which is adapted to be directly mounted on the substrate, is spaced from the protection glue by the respective outer zigzag portion which is not adapted to be directly mounted on the substrate, and
the protection glue as well as the semiconductor device and the inner ends embedded therein are adapted to be supported over the substrate, without direct contact with the substrate, by spring action of the outer zigzag portions of the respective metallic plates.
15. A surface mount semiconductor device package mounted on top of a substrate, said package comprising:
a semiconductor device;
a first metallic plate comprising opposite inner and outer ends, and a cantilever bridging the two ends to cushion stress between the two ends; and
protection glue covering at least the semiconductor device and the inner end of the metallic plate;
wherein said cantilever comprises:
an inner zigzag portion connected to the inner end and covered by the protection glue, and
an outer zigzag portion connected to the outer end and positioned outside the protection glue;
wherein
said semiconductor device is mounted on an upper surface of said inner end to be electrically coupled to said inner end;
said outer end has a lower surface opposite to the upper surface and mounted directly on the substrate;
the outer end, the lower surface of which is directly mounted on the substrate, is spaced from the protection glue by the outer zigzag portion which is not directly mounted on the substrate, and
the protection glue as well as the semiconductor device and the inner end embedded therein are supported over the substrate, without direct contact with the substrate, by spring action of at least the outer zigzag portion.
16. The surface mount semiconductor device package mounted on top of the substrate as claimed in claim 15 , wherein the package further comprises:
a second metallic plate comprising opposite inner and outer ends, and a second cantilever bridging the two ends of the second metallic plate to cushion stress between the two ends of the second metallic plate;
wherein
said semiconductor device is further mounted on an upper surface of said inner end of the second metallic plate to be electrically coupled to said inner end of the second metallic plate and to span between the inner ends of the first and second metallic plates; and
said outer end of the second metallic has a lower surface opposite to the upper surface and mounted directly on the substrate.
17. The surface mount semiconductor device package mounted on top of the substrate as claimed in claim 16 , wherein
said second cantilever comprises:
an inner zigzag portion connected to the inner end of the second metallic plate and covered by the protection glue, and
an outer zigzag portion connected to the outer end of the second metallic plate and positioned outside the protection glue;
the outer end of each of the metallic plates, the lower surface of which is directly mounted on the substrate, is spaced from the protection glue by the respective outer zigzag portion which is not directly mounted on the substrate, and
the protection glue as well as the semiconductor device and the inner ends embedded therein are supported over the substrate, without direct contact with the substrate, by spring action of the outer zigzag portions of the respective metallic plates.
18. The surface mount semiconductor device package mounted on top of the substrate as claimed in claim 15 , further comprising
a second metallic plate comprising opposite inner and outer ends, and a second cantilever bridging the two ends of the second metallic plate to cushion stress between the two ends of the second metallic plate;
wherein
said semiconductor device has a top electrode wire-bonded to the inner end of the second metallic plate and a bottom electrode mounted on and electrically connected to the inner end of the first metallic plate;
the outer end of the second metallic plate has a lower surface opposite to the upper surface and mounted directly on the substrate; and
the semiconductor device is entirely mounted on the inner end of the first metallic plate.
19. The surface mount semiconductor device package mounted on top of the substrate as claimed in claim 18 , wherein
said second cantilever comprises:
an inner zigzag portion connected to the inner end of the second metallic plate and covered by the protection glue, and
an outer zigzag portion connected to the outer end of the second metallic plate and positioned outside the protection glue; and
the outer end of each of the metallic plates, the lower surface of which is directly mounted on the substrate, is spaced from the protection glue by the respective outer zigzag portion which is not directly mounted on the substrate, and
the protection glue as well as the semiconductor device and the inner ends embedded therein are supported over the substrate, without direct contact with the substrate, by spring action of the outer zigzag portions of the respective metallic plates.
20. The surface mount semiconductor device package mounted on top of the substrate as claimed in claim 18 , wherein
said second cantilever comprises:
an inner zigzag portion connected to the inner end of the second metallic plate and covered by the protection glue, and
an outer zigzag portion connected to the outer end of the second metallic plate and positioned outside the protection glue; and
the outer end of each of the metallic plates, the lower surface of which is directly mounted on the substrate, is spaced from the protection glue by the respective outer zigzag portion which is not directly mounted on the substrate, and
the protection glue as well as the semiconductor device and the inner ends embedded therein are freely supported over the substrate, without direct contact with the substrate, by spring action of the outer zigzag portions of the respective metallic plates.