Fracturing polygons used in a lithography process for fabricating an integrated circuit
View Patent ↗A system is provided for fracturing a polygon on a mask layout used in a lithographic process for manufacturing an integrated circuit. The system receives mask layouts that include polygons that may include holes with exit routes near notches either on the outside of the polygon or internal to the hole. A notch is undesirable because fracturing the polygon for printing by the lithographic equipment can create slivers that do not expose well during exposure. The system moves the exit route for a vertex trace so that the exit route passes through a vertex of the notch thereby eliminating the sliver.
1. A method for fracturing a polygon on a mask layout used in a lithographic process for manufacturing an integrated circuit, comprising:
receiving the mask layout, wherein geometry from the mask layout includes the polygon;
examining the polygon to determine if the polygon includes a hole exit route next to a notch; and
if so, moving an exit route from the hole so that a resulting fracturing of the polygon does not create a sliver with a width less than a pre-specified minimum size.
2. The method of claim 1 , wherein moving the exit route from the hole involves moving the exit route so that a vertex trace for the polygon can be routed into the hole and out of the hole at a vertex associated with the notch.
3. The method of claim 2 , wherein the notch is located at either an exterior of the polygon or an interior of the hole.
4. The method of claim 1 , wherein determining if the polygon includes the hole next to the notch involves:
locating an inner corner that forms on the polygon; and
determining if the inner corner is within a pre-specified distance of the exit route of a vertex trace into and out of the hole.
5. The method of claim 1 , wherein if the polygon includes the hole next to the notch, the method further comprises moving the exit route used by a vertex trace to enter and exit the hole so that the exit route intersects a vertex associated with the notch.
6. The method of claim 1 , wherein moving the exit route used by a vertex trace involves altering the exit route to create a new route at the notch.
7. The method of claim 1 , wherein the lithographic process includes a direct write process onto a wafer.
8. A computer-readable storage medium storing instructions that when executed by a computer cause the computer to perform a method for fracturing a polygon on a mask layout used in a lithographic process for manufacturing an integrated circuit, wherein the computer-readable storage medium includes an electromagnetic waveform, the method comprising:
receiving the mask layout, wherein geometry from the mask layout includes the polygon;
examining the polygon to determine if the polygon includes a hole next to a notch; and
if so, moving an exit route from the hole so that a resulting fracturing of the polygon does not create a sliver with a width less than a pre-specified minimum size.
9. The computer-readable storage medium of claim 8 , wherein moving the exit route from the hole involves moving the exit route so that a vertex trace for the polygon can be routed into the hole and out of the hole at a vertex associated with the notch.
10. The computer-readable storage medium of claim 9 , wherein the notch is located at either an exterior of the polygon or an interior of the hole.
11. The computer-readable storage medium of claim 8 , wherein determining if the polygon includes the hole next to the notch involves:
locating an inner corner that forms on the polygon; and
determining if the inner corner is within a pre-specified distance of the exit route of a vertex trace into and out of the hole.
12. The computer-readable storage medium of claim 8 , wherein if the polygon includes the hole next to the notch, the method further comprises moving the exit route used by a vertex trace to enter and exit the hole so that the exit route intersects a vertex associated with the notch.
13. The computer-readable storage medium of claim 8 , wherein moving the exit route used by a vertex trace involves altering the exit route to create a new route at the notch.
14. The computer-readable storage medium of claim 8 , wherein the lithographic process includes a direct write process onto a wafer.
15. A mask having structures that were fractured according to a technique used in a lithographic process for manufacturing an integrated circuit,
wherein the mask includes a polygon;
wherein the polygon includes a hole;
wherein the hole exit route is next to a notch; and
wherein an exit route from the hole has been moved so that a sliver has not been created with a width less than a pre-specified minimum size.
16. The mask of claim 15 , wherein the exit route from the hole has been moved so that a vertex trace for the polygon can be routed into the hole and out of the hole at a vertex associated with the notch.
17. The mask of claim 16 , wherein the notch is located at either an exterior of the polygon or an interior of the hole.
18. The mask of claim 15 , wherein the notch is within a pre-specified distance of the exit route of a vertex trace into and out of the hole.
19. The mask of claim 15 , wherein the exit route from the hole has been moved so that the exit route intersects a vertex associated with the notch.
20. The mask of claim 15 , wherein the exit route used by a vertex trace has been altered to create a new route at the notch.
21. The mask of claim 15 , wherein the lithographic process includes a direct write process onto a wafer.