Multi-layer printed circuit board fabrication system and method
View Patent ↗A method for aligning an image to be recorded by a direct image scanner on an upper layer of a printed circuit board with an image recorded on a lower layer thereof, the method comprising visually imaging a portion of the image on the lower layer and recording a pattern on the upper layer, referenced to coordinates of the visual image of the portion.
1. Apparatus for recording an electrical circuit pattern on an upper layer of a multi-layer printed circuit board substrate, comprising:
an alignment pattern generator generating an alignment pattern that is visible on the upper surface of the multi-layer printed circuit board substrate, said alignment pattern having a known orientation with respect to an electrical circuit pattern formed on one non-upper layer of the substrate, said substrate having at least two layers of circuitry already formed thereon;
an alignment pattern location sensor sensing a location of the alignment pattern; and
an electrical circuit pattern generator recording an electrical circuit pattern on said upper surface in a desired orientation with reference to the alignment pattern.
2. Apparatus for recording an electrical circuit pattern according to claim 1 , and wherein said alignment pattern generator is a micro machining device.
3. Apparatus for recording an electrical circuit pattern according to claim 2 , and wherein micro machining device is a laser drill.
4. Apparatus for recording an electrical circuit pattern according to claim 2 , and wherein said alignment pattern is defined by a plurality of micro-machined holes, and wherein said micro-machined holes do not pass through at least one layer in said multi-layered substrate.
5. Apparatus for recording an electrical circuit pattern according to claim 4 , and wherein said plurality of micro-machined holes is arranged in a non-periodic pattern.
6. Apparatus for recording an electrical circuit pattern according to claim 1 , and wherein said alignment pattern is defined by a plurality of holes in said upper surface.
7. Apparatus for recording an electrical circuit pattern according to claim 6 , and wherein said plurality of holes is arranged in a non-periodic pattern.
8. Apparatus for recording an electrical circuit pattern according to claim 1 , and wherein said alignment pattern is defined by a plurality of objects deposited on said upper surface, said objects being arranged in a non-periodic pattern.
9. Apparatus for recording an electrical circuit pattern according to claim 8 , and wherein said plurality of objects is a plurality of markings.
10. Apparatus for recording an electrical circuit pattern according to claim 9 , and wherein said markings are dimples.
11. Apparatus for recording an electrical circuit pattern according to claim 1 , and wherein said an alignment pattern location sensor comprises a digital camera and an image processing circuit operative to acquire an image and compute a location of said alignment pattern.
12. Apparatus for recording an electrical circuit pattern according to claim 11 , and wherein said location of said alignment pattern is computed in a coordinate system employed by said electrical circuit pattern generator.
13. Apparatus for recording an electrical circuit pattern according to claim 12 , and wherein said upper layer includes a photosensitized surface and said electrical circuit pattern generator is a laser direct imaging scanner selectively recording an electrical circuit pattern on said photosensitized surface.
14. Apparatus for recording an electrical circuit pattern according to claim 12 , and wherein said upper layer includes a photosensitized surface and said electrical circuit pattern generator comprises a phototool mask and a light projector projecting light through said phototool mask onto said photosensitized surface to selectively record an electrical circuit pattern thereon.
15. Apparatus for aligning a first electrical circuit pattern to be recorded on an upper layer of a multi-layer printed circuit board substrate to a second electrical circuit pattern formed on a lower layer of the multi-layer printed circuit board substrate, comprising:
an alignment pattern location sensor sensing a location of an alignment pattern located on a multi-layered printed circuit board substrate including at least said upper layer connected to a lower layer, said second electrical circuit pattern being formed on said lower layer, said alignment pattern having a known orientation to said second electrical circuit pattern; and
an electrical circuit pattern generator recording an electrical circuit pattern on said upper surface in a desired orientation with reference to the alignment pattern.
16. Apparatus for recording an electrical circuit pattern according to claim 15 , and wherein said alignment pattern is disposed along said upper layer.
17. Apparatus for recording an electrical circuit pattern according to claim 16 , and wherein said alignment pattern is defined by a plurality of holes in said upper surface.
18. Apparatus for recording an electrical circuit pattern according to claim 17 , and wherein said plurality of holes is arranged in a non-periodic pattern.
19. Apparatus for recording an electrical circuit pattern according to claim 17 , and wherein said plurality of holes do not pass through said lower layer.
20. Apparatus for recording an electrical circuit pattern according to claim 15 , and wherein said alignment pattern is defined by a plurality of holes through said multi-layered printed circuit board substrate.
21. Apparatus for recording an electrical circuit pattern according to claim 20 , and wherein said plurality of holes is arranged in a non-periodic pattern.
22. Apparatus for recording an electrical circuit pattern according to claim 15 , and wherein said alignment pattern is defined by a plurality of visible objects deposited on said upper surface, said visible objects being arranged in a non-periodic pattern.
23. Apparatus for recording an electrical circuit pattern according to claim 22 , and wherein said plurality of visible objects is a plurality of markings.
24. Apparatus for recording an electrical circuit pattern according to claim 23 , and wherein said markings are dimples.
25. Apparatus for recording an electrical circuit pattern according to claim 15 , and wherein said an alignment pattern location sensor comprises a digital camera and image processing circuitry operative to acquire an image and compute a location of said alignment pattern.
26. Apparatus for recording an electrical circuit pattern according to claim 25 , and wherein said location of said alignment pattern is computed in a coordinate system employed by said electrical circuit pattern generator.
27. Apparatus for recording an electrical circuit pattern according to claim 26 , and wherein said upper layer includes a photosensitized surface and said electrical circuit pattern generator is a laser direct imaging scanner selectively recording an electrical circuit pattern on said photosensitized surface.
28. Apparatus for recording an electrical circuit pattern according to claim 26 , and wherein said upper layer includes a photosensitized surface and said electrical circuit pattern generator comprises a phototool mask and a light projector projecting light through said phototool mask onto said photosensitized surface to selectively record an electrical circuit pattern thereon.