Sense amplifier based voltage comparator
View Patent ↗The voltage comparator of the present invention comprises a sense amplifier connected to a latch. The sense amplifier has a first input terminal for connecting to the input voltage under consideration and a second input terminal for connecting to the reference voltage. The sense amplifier generates two voltages of opposite logic values (i.e., high or low). A latch accepts these two voltages and generates an output voltage that is indicative of whether the voltage under consideration is higher or lower than the reference voltage. In another embodiment, a signal conditioning circuit is used to reduce the transients in the input voltage under consideration and perform level shifting function.
1. A voltage comparator for comparing an input voltage and a reference voltage and generating an output voltage indicative of the comparing, comprising:
a sense amplifier having a first input terminal for connecting to the input voltage and a second input terminal for connecting to the reference voltage, the sense amplifier generating a first output voltage at a first output terminal and a second output voltage at a second output terminal; and
a latch coupled to the first and the second output terminals and generating the output voltage;
wherein the reference voltage is at ground level.
2. The voltage comparator of claim 1 wherein the sense amplifier is controlled by a clock signal and operates under a precharge phase and an evaluate phase.
3. The voltage comparator of claim 1 wherein the latch is a flip flop.
4. The voltage comparator of claim 1 further comprising a signal conditioning circuit that can remove transients of the input voltage.
5. The voltage comparator of claim 4 wherein the signal conditioning circuit comprises two resistors connected to a decoupling capacitor.
6. The voltage comparator of claim 5 wherein the capacitor comprises a transistor.
7. A method for comparing an input voltage and a reference voltage, comprising:
providing a sense amplifier having a first input terminal for connecting to the input voltage and a second input terminal for connecting to the reference voltage, the sense amplifier generating a first output voltage at a first output terminal and a second output voltage at a second output terminal;
connecting the first output terminal to one input terminal of a latch and connecting the second output terminal to another input terminal of the latch; and
generating by the latch an output voltage indicative of a comparison of the input voltage and the reference voltage;
wherein the reference voltage is at ground level.
8. The method of claim 7 further comprising controlling the sense amplifier using a clock signal, and wherein the sense amplifier operates under a precharge phase and an evaluate phase.
9. The method of claim 7 further comprising removing transients of the input voltage.
10. The method of claim 7 wherein the latch is a flip flop.