Patent Assignment
Reel/Frame 031694/0018
Assignment of Assignor's Interest
Recorded: 2013-11-21
Pages: 25
Assignor
T-RAM SEMICONDUCTOR, INC.
Executed: 2013-03-28
Assignee
T-RAM (ASSIGNMENT FOR THE BENEFIT OF CREDITORS), LLC
1100 LA AVENIDA STREET, BLDG. A, SHERWOOD PARTNERS, LLC, MOUNTAIN VIEW, CALIFORNIA, 94043
Covered Properties
(124)
Stability in Thyristor-Based Memory Device
Patent:
6,462,359 →
Application:
09/814,980 →
Thyristor-Based Device Including Trench Isolation
Patent:
6,727,528 →
Application:
09/815,213 →
Thyristor-Based Device Over Substrate Surface
Patent:
6,653,174 →
Application:
10/023,052 →
Thyristor-Based Device Having Extended Capacitive Coupling
Patent:
6,583,452 →
Application:
10/023,060 →
Reference Cells for Tcct Based Memory Cells
Patent:
6,940,772 →
Application:
10/100,705 →
Read-Modify-Write Memory Using Read-or-Write Banks
Patent:
6,804,162 →
Application:
10/117,501 →
Memory Cell Error Recovery
Patent:
6,785,169 →
Application:
10/117,596 →
Reference Cells for Tcct Based Memory Cells
Patent:
6,611,452 →
Application:
10/117,930 →
Reference Cells for Tcct Based Memory Cells
Patent:
6,781,888 →
Application:
10/167,382 →
Memory Architecture for Tcct-Based Memory Cells
Patent:
6,778,435 →
Application:
10/170,816 →
Bit Line Control and Sense Amplification for Tcct-Based Memory Cells
Thyristor-Based Device Over Substrate Surface
Patent:
6,690,038 →
Application:
10/200,987 →
Thyristor-Based Device Including Trench Isolation
Patent:
6,777,271 →
Application:
10/201,654 →
Bit Line Control and Sense Amplification for Tcct-Based Memory Cells
Patent:
6,958,931 →
Application:
10/209,116 →
Single Data Line Sensing Scheme for Tcct-Based Memory Cells
Stability in Thyristor-Based Memory Device
Patent:
6,653,175 →
Application:
10/231,805 →
Method for Making an Inlayed Thyristor-Based Device
Patent:
6,790,713 →
Application:
10/238,571 →
Fin Thyristor-Based Semiconductor Device
Patent:
7,135,745 →
Application:
10/238,572 →
Increased Base-Emitter Capacitance
Patent:
6,888,177 →
Application:
10/253,350 →
Thyristor with Lightly-Doped Emitter
Patent:
6,703,646 →
Application:
10/253,363 →
Buried Emitter Contact for Thyristor-Based Semiconductor Device
Patent:
7,030,425 →
Application:
10/262,696 →
Recessed Thyristor Control Port
Patent:
6,683,330 →
Application:
10/262,697 →
Shunt Connection to Emitter
Patent:
6,666,481 →
Application:
10/262,728 →
Trench Isolation for Thyristor-Based Device
Patent:
6,998,652 →
Application:
10/262,729 →
Varied Trench Depth for Thyristor Isolation
Patent:
6,815,734 →
Application:
10/262,758 →
Self-Aligned Thin Capacitively-Coupled Thyristor Structure
Patent:
6,767,770 →
Application:
10/262,770 →
Thyristor-Based Device That Inhibits Undesirable Conductive Channel Formation
Patent:
6,690,039 →
Application:
10/262,787 →
Method of Manufacturing a Thyristor Device with a Control Port in a Trench
Patent:
6,913,955 →
Application:
10/262,792 →
Method for Trench Isolation for Thyristor-Based Device
Patent:
6,818,482 →
Application:
10/263,370 →
Deep Trench Isolation for Thyristor-Based Semiconductor Device
Patent:
6,953,953 →
Application:
10/263,376 →
Thyristor-Based Device Adapted to Inhibit Parasitic Current
Patent:
6,686,612 →
Application:
10/263,382 →
Circuit and Method for Implementing a Write Operation with Tcct-Based Memory Cells
Thyristor-Based Device with Trench Dielectric Material
Patent:
6,835,997 →
Application:
10/282,294 →
Carrier Coupler for Thyristor-Based Semiconductor Device
Patent:
6,756,612 →
Application:
10/282,331 →
Thyristor-Based Device Having a Reduced-Resistance Contact to a Buried Emitter Region
Patent:
6,980,457 →
Application:
10/288,927 →
Thyristor-Based Device Having Dual Control Ports
Patent:
6,965,129 →
Application:
10/288,953 →
Electrostatic Discharge Protection Circuit
Charge Pump Based Voltage Regulator with Smart Power Regulation
Patent:
6,756,838 →
Application:
10/391,326 →
Geometric D/a Converter for a Delay-Locked Loop
Patent:
6,734,815 →
Application:
10/396,884 →
Semiconductor Region Self-Aligned with Ion Implant Shadowing
Patent:
6,828,202 →
Application:
10/400,943 →
Sense Amplifier Based Voltage Comparator
Patent:
6,937,085 →
Application:
10/423,767 →
Dynamic Data Restore in Thyristor-Based Memory Device
Thyrister Semiconductor Device and Method of Manufacture
Patent:
6,888,176 →
Application:
10/609,185 →
Reference Cells for Tcct Based Memory Cells
Patent:
6,845,037 →
Application:
10/634,268 →
Thyristor Semiconductor Memory Device and Method of Manufacture
Patent:
6,998,298 →
Application:
10/639,058 →
Thyristor Having a First Emitter with Relatively Lightly Doped Portion to the Base
Patent:
6,828,176 →
Application:
10/650,334 →
Apparatus and Method for Producing an Output Clock Pulse and Output Clock Generator Using Same
Patent:
6,947,349 →
Application:
10/654,258 →
Apparatus and Method for Producing Dummy Data and Output Clock Generator Using Same
Patent:
7,464,282 →
Application:
10/654,322 →
Architecture and Method for Output Clock Generation on a High Speed Memory Device
Patent:
7,089,439 →
Application:
10/654,358 →
Delay Line and Output Clock Generator Using Same
Patent:
6,891,774 →
Application:
10/654,561 →
Stability in Thyristor-Based Memory Device
Patent:
6,891,205 →
Application:
10/666,220 →
Thyristor Device with Carbon Lifetime Adjustment Implant and Its Method of Fabrication
Patent:
7,075,122 →
Application:
10/670,881 →
Shunt Connection to the Emitter of a Thyristor
Patent:
7,049,182 →
Application:
10/682,283 →
Data Restore in Thryistor Based Memory Devices
Patent:
6,944,051 →
Application:
10/695,171 →
Thyristor Circuit and Approach for Temperature Stability
Patent:
7,304,327 →
Application:
10/706,162 →
Method for Makimg a Recessed Thyristor Control Port
Patent:
6,979,602 →
Application:
10/730,755 →
Gated-Thyristor Approach Having Angle-Implanted Base Region
Patent:
7,037,763 →
Application:
10/739,859 →
Thyristor-Based Memory
Patent:
7,078,739 →
Application:
10/741,539 →
High Ion/Ioff Soi Mosfet Using Body Voltage Control
Patent:
7,109,532 →
Application:
10/746,758 →
Carrier Coupler for Thyristor-Based Semiconductor Device
Patent:
6,872,602 →
Application:
10/785,166 →
Thyristor-Based Device with Trench Dielectric Material
Patent:
7,374,974 →
Application:
10/794,843 →
Geometric D/a Converter for a Delay-Locked Loop
Patent:
6,819,278 →
Application:
10/808,148 →
Reference Cells for Tcct Based Memory Cells
Patent:
6,901,021 →
Application:
10/838,595 →
Method and System for Writing Data to Memory Cells
Patent:
7,054,191 →
Application:
10/860,194 →
Vertical Thyristor-Based Memory with Trench Isolation and Its Method of Fabrication
Patent:
7,456,439 →
Application:
10/884,337 →
Self-Aligned Thin Capacitively-Coupled Thyristor Structure
Patent:
6,911,680 →
Application:
10/890,031 →
Digital Signal Sampler
Patent:
7,096,144 →
Application:
10/913,907 →
Reference Cells for Tcct Based Memory Cells
Patent:
7,123,508 →
Application:
10/919,956 →
Read-Modify-Write Memory Using Read-or-Write Banks
Patent:
7,236,421 →
Application:
10/942,227 →
Thyristor-Based Memroy and Its Method of Operation
Patent:
7,268,373 →
Application:
10/947,794 →
Thyristor-Based Semiconductor Device and Method of Fabrication
Patent:
7,195,959 →
Application:
10/958,820 →
Varied Trench Depth for Thyristor Isolation
Patent:
7,015,077 →
Application:
10/970,085 →
Single Data Line Sensing Scheme for Tcct-Based Memory Cells
Patent:
7,006,398 →
Application:
10/977,309 →
Thyristor Having a First Emitter with Relatively Lightly Doped Portion to the Base
Patent:
7,053,423 →
Application:
10/982,443 →
Geometric D/a Converter for a Delay-Locked Loop
Patent:
6,975,260 →
Application:
10/986,707 →
Semiconductor Device Incorporating Thyristor-Based Memory and Strained Silicon
Patent:
7,326,969 →
Application:
11/004,712 →
Method of Manufacturing a Thyristor Semiconductor Device
Patent:
7,279,367 →
Application:
11/007,510 →
Thyristor-Based Semiconductor Memory Device and Its Method of Manufacture
Patent:
7,157,342 →
Application:
11/026,400 →
Silicide Uniformity for Lateral Bipolar Transistors
Patent:
7,262,443 →
Application:
11/027,401 →
Thyristor-Based Device Having Dual Control Ports
Patent:
7,320,895 →
Application:
11/086,113 →
Dynamic Data Restore in Thyristor-Based Memory Device
Thyristor-Based Semiconductor Memory Device with Back-Gate Bias
Patent:
7,573,077 →
Application:
11/122,932 →
Reference Cells for Tcct Based Memory Cells
Patent:
7,064,977 →
Application:
11/134,004 →
Thyristor-Based Semiconductor Memory and Memory Array with Data Refresh
Patent:
7,460,395 →
Application:
11/159,447 →
Semiconductor Device with Leakage Implant and Method of Fabrication
Self-Aligned Thin Capacitively-Coupled Thyristor Structure
Patent:
7,125,753 →
Application:
11/159,738 →
Bitline Shielding for Thyristor-Based Memory
Patent:
7,319,622 →
Application:
11/174,813 →
State Maintenance Pulsing for a Memory Device
Patent:
7,379,381 →
Application:
11/175,057 →
Workfunction-Adjusted Thyristor-Based Memory Device
Patent:
7,381,999 →
Application:
11/187,777 →
Semiconductor Device with a Mosfet Formed in Close Proximity to a Bipolar Device and Method of Manufacture
Patent:
7,316,941 →
Application:
11/190,242 →
Data Restore in Thryistor Based Memory Devices
Patent:
7,245,525 →
Application:
11/194,184 →
System and Method of Integrated Circuit Testing
Patent:
7,587,643 →
Application:
11/213,043 →
Deep Trench Isolation for Thyristor-Based Semiconductor Device
Patent:
7,351,614 →
Application:
11/230,897 →
Trench Isolation for Thyristor-Based Device
Patent:
7,183,591 →
Application:
11/238,773 →
Thyristor Semiconductor Memory Device and Method of Manufacture
Patent:
7,256,430 →
Application:
11/303,228 →
Reduction of Charge Leakage from a Thyristor-Based Memory Cell
Patent:
7,786,505 →
Application:
11/303,237 →
Single Data Line Sensing Scheme for Tcct-Based Memory Cells
Patent:
7,324,394 →
Application:
11/360,181 →
Dynamic Data Restore in Thyristor-Based Memory Device
Reducing Effects of Parasitic Transistors in Thyristor-Based Memory Using an Isolation or Damage Region
Patent:
7,554,130 →
Application:
11/361,869 →
Reducing Effects of Parasitic Transistors in Thyristor-Based Memory Using Local Thinning or Implanting
Patent:
8,174,046 →
Application:
11/362,285 →
Thyristor-Based Semiconductor Device with Indium-Carbon Implant and Method of Fabrication
Patent:
7,592,642 →
Application:
11/398,398 →
Thyristor Device with Carbon Lifetime Adjustment Implant and Its Method of Fabrication
Patent:
7,488,626 →
Application:
11/483,859 →
Thyristor-Based Memory and Its Method of Operation
Patent:
7,488,627 →
Application:
11/487,548 →
High Ion/Ioff Soi Mosfet Using Body Voltage Control
Patent:
7,489,008 →
Application:
11/522,037 →
Fin Thyristor-Based Semiconductor Device
Patent:
7,968,381 →
Application:
11/581,316 →
Thyristor Based Memory Cell
Patent:
7,894,255 →
Application:
11/881,049 →
Thyristor Based Memory Cell
Patent:
7,894,256 →
Application:
11/881,159 →
Thyristor Semiconductor Device and Method of Manufacture
Patent:
7,804,107 →
Application:
11/906,619 →
Content-Addressable Memory Architecture
Patent:
7,738,274 →
Application:
12/079,548 →
Dynamic Data Restore in Thyristor-Based Memory Device
Thyristor Semiconductor Memory and Method of Manufacture
Patent:
8,093,107 →
Application:
12/271,758 →
Vertical Thyristor-Based Memory with Trench Isolation and Method of Fabrication Thereof
Patent:
7,897,440 →
Application:
12/277,290 →
Thyristor-Based Memory Array Having Lines with Standby Voltages
Patent:
7,969,777 →
Application:
12/326,027 →
Thyristor Device with Carbon Lifetime Adjustment Implant and Its Method of Fabrication
High Ion/Ioff Soi Mosfet Using Body Voltage Control
Thyristor-Based Memroy and Its Method of Operation
Patent:
7,893,456 →
Application:
12/368,226 →
Sense Amplifiers
Patent:
7,859,929 →
Application:
12/422,152 →
Programmable Built-in Self-Test Architecture
Patent:
8,069,385 →
Application:
12/501,995 →
Thyristor-Based Semiconductor Memory Device with Back-Gate Bias
Patent:
7,859,012 →
Application:
12/538,805 →
Gettering Contaminants for Integrated Circuits Formed on a Silicon-on-Insulator Structure
Patent:
8,017,998 →
Application:
12/555,665 →
Sense Amplifiers and Operations Thereof
Patent:
8,576,649 →
Application:
13/172,017 →
Tracking for Read and Inverse Write Back of a Group of Thyristor-Based Memory Cells
Patent:
8,441,881 →
Application:
13/172,630 →
Hybrid Memory Cell Array and Operations Thereof
Patent:
8,576,607 →
Application:
13/172,702 →
Reduction of Electrostatic Coupling for a Thyristor-Based Memory Cell
Patent:
8,324,656 →
Application:
13/175,676 →
Related Assignments
(7)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Dec 17, 2001
From: CHO, HYUN-JIN; HORCH, ANDREW; ROBINS, SCOTT; NEMATI, FARID
To: T-RAM, INC.
Reel/Frame 012406/0223 →
Assignment of Assignor's Interest
Dec 17, 2001
From: CHO, HYUN-JIN; HORCH, ANDREW; ROBINS, SCOTT; NEMATI, FARID
To: T-RAM INC
Reel/Frame 012406/0165 →
Assignment of Assignor's Interest
Sep 24, 2002
From: NEMATI, FARID; ROBINS, SCOTT; HORCH, ANDREW
To: T-RAM, INC.
Reel/Frame 014319/0494 →
Security Agreement
Aug 7, 2008
From: T-RAM SEMICONDUCTOR INCORPORATED
To: SILICON VALLEY BANK
Reel/Frame 021354/0186 →
Change of Name
Nov 21, 2008
From: T-RAM, INC.
To: T-RAM SEMICONDUCTOR, INC.
Reel/Frame 021876/0151 →
Release
May 18, 2010
From: SILICON VALLEY BANK
To: T RAM SEMICONDUCTOR INCORPORATED
Reel/Frame 024492/0651 →
Purchase Option Agreement
Jun 3, 2010
From: T-RAM SEMICONDUCTOR, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 024474/0979 →