Thyristor-based semiconductor device with indium-carbon implant and method of fabrication
View Patent ↗A thyristor-based memory device may comprise two base regions of opposite type conductivity formed between a cathode-emitter region and an anode-emitter region. A junction defined between the p-base region and the cathode-emitter region of the thyristor may be “treated” with a high ionization energy acceptor such as indium in combination with carbon as an activation assist species. These two implants may form complexes that may extend across the junction region.
1. A semiconductor device, comprising:
a thyristor formed in semiconductor material, the thyristor comprising at least one base region having normal acceptor-type dopant; and
complexes defined at least in part by atomic pairing of a high ionization energy acceptor and an activation species in a portion of the semiconductor material including at least a portion of the base region, wherein the high ionization energy acceptor is different from the normal acceptor-type dopant and of ionization energy greater than that of the normal acceptor-type dopant.
2. The device of claim 1 , in which the activation species comprises carbon of density sufficient to influence ionization of the high ionization energy acceptor within the semiconductor material.
3. The device of claim 2 , in which the high ionization energy acceptor comprises indium.
4. The device of claim 3 , in which the complexes of the atomically paired indium and carbon are disposed in the P-base region of the thyristor.
5. The device of claim 1 , in which:
the semiconductor material comprises a layer of silicon disposed over dielectric;
the activation species comprises carbon;
the high ionization energy acceptor comprises indium;
the indium and the carbon form indium-carbon atomically paired complexes in the silicon; and
the carbon of density sufficient and operable to enhance activation efficacy of the indium in the portion of the silicon.
6. The device of claim 5 , in which the at least one base region is a p-base region that defines a junction with a cathode-emitter region of the thyristor; and
the complexes of the atomically paired indium-carbon have a distribution in the layer of silicon that overlaps the junction.
7. The device of claim 6 , in which a constituent bipolar transistor of the thyristor associated with the p-base is characterized by a gain dependent on temperature; and
the p-base comprises a concentration of the indium and the associated carbon complexes associated therewith sufficient to at least partly stabilize the gain of the constituent bipolar transistor over a given range of temperature.
8. The device of claim 7 , in which the layer of silicon over the dielectric comprises a thickness less than 2000 Å and the portion with the complexes of the atomically paired indium-carbon comprises a concentration of the indium and the carbon sufficient for an activation density of at least 10 18 per cm 3 .
9. A thyristor-based semiconductor memory comprising:
a thyristor comprising at least two base regions of opposite type conductivity;
an electrode capacitively coupled to one of the two base regions of given dopant;
complexes defined at least in part by atomic pairing of a high ionization energy acceptor with an activation species disposed in at least a portion of the one of the two base regions, the high ionization energy acceptor different from the given dopant and of ionization energy greater than that of the given dopant.
10. The memory of claim 9 , in which the activation species comprises carbon of density sufficient to influence ionization of the high ionization energy acceptor in the semiconductor material.
11. The memory of claim 10 , in which the high ionization energy acceptor comprises indium.
12. The memory of claim 10 , in which the complexes of the atomically paired indium and the carbon are disposed in a P-base region of the thyristor.
13. The memory of claim 9 , in which a constituent bipolar transistor of the thyristor associated with the one of the two base regions is characterized by a gain dependent on temperature; and
the one of the two base regions comprises a concentration of the complexes sufficient to at least partly stabilize the gain of the constituent bipolar transistor over a given range of temperature.
14. The memory of claim 9 , further comprising a gateable access device disposed electrically in series with the thyristor to define a cell to at least a portion of the thyristor-based memory.
15. The memory of claim 14 , in which the gateable access device comprises at least a drain region, a source region and a body region therebetween, the drain region in common with a cathode-emitter region of the thyristor.
16. The memory of claim 15 , in which the complexes define a distribution in the thyristor that extends across a junction that is defined between a p-base as said one of the two base regions and the cathode-emitter region.
17. The memory of claim 14 , further comprising means for performing at least one of the operations of the group consisting of reading, storing or writing data from/into the cell of the thyristor-based memory.